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x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: ed7ac84b-5d75-4404-8ae4-08d77961fdb8 x-ms-traffictypediagnostic: DB7PR04MB4364:|DB7PR04MB4364: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; x-forefront-prvs: 02426D11FE x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(136003)(346002)(366004)(39860400002)(396003)(376002)(199004)(189003)(54906003)(44832011)(9686003)(55016002)(6306002)(110136005)(6246003)(478600001)(71200400001)(25786009)(229853002)(14454004)(966005)(71190400001)(99286004)(74316002)(186003)(2501003)(8936002)(52536014)(33656002)(3846002)(5660300002)(8676002)(4326008)(102836004)(26005)(81166006)(81156014)(86362001)(305945005)(2906002)(7696005)(11346002)(76116006)(316002)(64756008)(66446008)(66556008)(66946007)(14444005)(7736002)(76176011)(53546011)(6436002)(6116002)(6506007)(66476007)(32563001);DIR:OUT;SFP:1101;SCL:1;SRVR:DB7PR04MB4364;H:DB7PR04MB4490.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: OsetTLeZXtdnBXOEqvX2u+ObvOXgrHlnlZm0cx2XJ9cNNPBROzbmUgn85LqirxwScAWKita14uVS4v4QfJdYKvP6rPDZlgpcrHRyLPkMpih96FC4ha4R3m8N2OuTbDt6H0fa8TcGXruO8yHEgBuawFLL/olnPkVzQfQhe93WV8Y1QSLcj/QoP4kI4j9hQ11n+u3uIOP8XqcehuC+RGJLElKWQPqO3WYrcTnvEvf1McjOqYnb7rKaTRvcyUuFoEGPwZRR2bn/S9NFHRsqLwWRREtlm/6MVgZFsjmyY0Yqq5mMotqnfplQdva6d38Lnuycy0tyBzSxP5vIvKrZfVYenZrWeRUXVuqR+i3AqXcWT6i+q1cN5/8+jbb56JkZiuLZMaQw5dQpNAD8kuorH0Br5GnYePd2Tvpt4BF5Q59hukSSrSA4dSwS4W5iFM7g7+QwCmMK/iiC2K4g049ULT9k7AsDNc/kWZ3vBqd1+PfUi0htgV57/xuzchG9MyhNyL3Y0gBTF/Jq4aySQ7ctVaUWog== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ed7ac84b-5d75-4404-8ae4-08d77961fdb8 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Dec 2019 09:03:26.9254 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: dpXgxSpG0otRlaEKzHLKngqRa2w4BuIbCDuKRdoetF1i5YkzJ37WDyVvQwJShqVQCv1eXLvw5xIpbcgUJd5W7w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4364 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH] clk: imx: imx8qxp-lpcg: use > devm_platform_ioremap_resource >=20 > On 2019-12-05 3:38 AM, Peng Fan wrote: > >> Subject: Re: [PATCH] clk: imx: imx8qxp-lpcg: use > >> devm_platform_ioremap_resource > >> > >> On 2019-12-04 12:14 PM, Peng Fan wrote: > >>> From: Peng Fan > >>> > >>> devm_platform_ioremap_resource() wraps platform_get_resource() and > >>> devm_ioremap_resource(), we could use this API to simplify the code. > >>> > >>> Signed-off-by: Peng Fan > >> > >> This patch has been posted before and it breaks uart on imx8qxp-mek > >> and possibly other things. > >> > >> The old and new paths are not equivalent: > >> devm_platform_ioremap_resource calls devm_ioremap_resource differs > >> from devm_ioremap by also calling devm_request_mem_region. > >> > >> This prevents other mappings in the area; this is not an issue for > >> most drivers but imx8qxp-lpcg maps whole subsystems. For example: > >> > >> adma_lpcg: clock-controller@59000000 { > >> compatible =3D "fsl,imx8qxp-lpcg-adma"; > >> reg =3D <0x59000000 0x2000000>; > >> #clock-cells =3D <1>; > >> }; > >> > >> adma_lpuart0: serial@5a060000 { > >> reg =3D <0x5a060000 0x1000>; > >> ... > >> }; > >> > >> Previously: https://patchwork.kernel.org/patch/10908807/ > > > > Thanks. I think at least need to provide some comments in code. >=20 > Yes, comments would help. I think it's actually the 3rd time this incorre= ct > cleanup was posted. >=20 > But mapping entire subsystems (32mb at a time) for LPCG is deeply > flawed: the LPCG areas are each 64k and they're interspersed among the > peripherals. The correct solution is to have many small clock providers. >=20 > This is done by a series of patches from Aisheng, I think this is the lat= est one: >=20 > https://patchwork.kernel.org/patch/11248235/ >=20 > If some aspects of that series are dubious perhaps they could be discusse= d > and maybe the series could be split into smaller chunks? That would be lots of lpcg nodes in device tree. >=20 > That series does brings many essential improvements to imx8 clk support. Seems that pending for long time? What is the blocking point? Regards, Peng. >=20 > -- > Regards, > Leonard