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([2001:b07:6468:f312:541f:a977:4b60:6802]) by smtp.gmail.com with ESMTPSA id a64sm10949477wmc.18.2019.12.05.02.16.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Dec 2019 02:16:16 -0800 (PST) Subject: Re: [PATCH 4/5] KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality To: Jim Mattson Cc: LKML , kvm list , Sean Christopherson References: <1574101067-5638-1-git-send-email-pbonzini@redhat.com> <1574101067-5638-5-git-send-email-pbonzini@redhat.com> From: Paolo Bonzini Message-ID: Date: Thu, 5 Dec 2019 11:16:16 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-MC-Unique: ShB98dJGMjC8RdAxzr9idg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/12/19 00:49, Jim Mattson wrote: >> if (!boot_cpu_has(X86_FEATURE_RTM)) >> - data &= ~ARCH_CAP_TAA_NO; >> + data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR); >> else if (!boot_cpu_has_bug(X86_BUG_TAA)) >> data |= ARCH_CAP_TAA_NO; >> - else if (data & ARCH_CAP_TSX_CTRL_MSR) >> - data &= ~ARCH_CAP_MDS_NO; >> >> - /* KVM does not emulate MSR_IA32_TSX_CTRL. */ >> - data &= ~ARCH_CAP_TSX_CTRL_MSR; > Shouldn't kvm be masking off any bits that it doesn't know about here? > Who knows what future features we may claim to support? Good question, in the past the ARCH_CAPABILITIES were just "we don't have this bug" so it made sense to pass everything through. Now we have TSX_CTRL that is of a different kind and arguably should have been a CPUID bit, so we should indeed mask unknown capabilties. Paolo