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From:   Thomas Garnier <thgarnie@chromium.org>
Date:   Thu, 5 Dec 2019 09:01:50 -0800
Message-ID: <CAJcbSZF+vGE6ZseiQfcis2NMcimmpwvov_P-tZe--z5UxJPDdg@mail.gmail.com>
Subject: Re: [PATCH v10 04/11] x86/entry/64: Adapt assembly for PIE support
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     Kernel Hardening <kernel-hardening@lists.openwall.com>,
        Kristen Carlson Accardi <kristen@linux.intel.com>,
        Kees Cook <keescook@chromium.org>,
        Andy Lutomirski <luto@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        "H. Peter Anvin" <hpa@zytor.com>,
        "the arch/x86 maintainers" <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>
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Sender: linux-kernel-owner@vger.kernel.org
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On Thu, Dec 5, 2019 at 1:04 AM Peter Zijlstra <peterz@infradead.org> wrote:
>
> On Wed, Dec 04, 2019 at 04:09:41PM -0800, Thomas Garnier wrote:
>
> > @@ -1625,7 +1627,11 @@ first_nmi:
> >       addq    $8, (%rsp)      /* Fix up RSP */
> >       pushfq                  /* RFLAGS */
> >       pushq   $__KERNEL_CS    /* CS */
> > -     pushq   $1f             /* RIP */
> > +     pushq   $0              /* Future return address */
>
> We're building an IRET frame, the IRET frame does not have a 'future
> return address' field.

I assumed that's the target RIP after iretq.

>
> > +     pushq   %rdx            /* Save RAX */
>
> fail..

Yes, sorry. I was asked to switch from RAX to RDX and missed the comment.

>
> > +     leaq    1f(%rip), %rdx  /* RIP */
>
> nonsensical comment

That was the same comment from the push $1f that I changed.

>
> > +     movq    %rdx, 8(%rsp)   /* Put 1f on return address */
> > +     popq    %rdx            /* Restore RAX */
>
> fail..

I will change in next iteration.

>
> >       iretq                   /* continues at repeat_nmi below */
> >       UNWIND_HINT_IRET_REGS
> >  1:
> > --
> > 2.24.0.393.g34dc348eaf-goog
> >