Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp3876499ybl; Mon, 9 Dec 2019 01:24:35 -0800 (PST) X-Google-Smtp-Source: APXvYqx+q/y3+HBIdz+7gfzCii3J8sQtvzwjpTMn9yM3CAUyF1LOkhvOGntg12AmewD2N8hrYoPt X-Received: by 2002:a9d:4d99:: with SMTP id u25mr15686075otk.56.1575883475758; Mon, 09 Dec 2019 01:24:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575883475; cv=none; d=google.com; s=arc-20160816; b=w58T9ePnv0IuqtEjvwxSwBly+6dewFVZKEB+rrHXpU1q+Icg4oCrGxhZ/T6qUrnR2Z wT01Zhn528Prw7CxqnAzEECcNg1lLbQAQdCOywE2XvJqp4O8agztIwYO/aaOrIND9mhn hh78uaOmAfkEhkOR8v79EVFct7gPO05+pgxnZzRhRX6GlK90VTnDLs5/iTqbjvwbqcU7 lKCvrKDUPTNrnTcNR70nLPr08gWrYDJbqv5eUq4CRWxysIpIzr1KfYzH8B5qE1iWD3W8 TG0NPlL4Htkg5BmZw7VGK2df6J9FePO5hUX4zJy8t7CYq49ANxq9bsReKqzJCujbp8BH Es0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=e6hxSqMhnYSc1quH2PjTd+tq3J4d6kZNVpT2EaB+yPc=; b=R4VMYG4cfAG8LrzC+rIyAo/9VxlHiBZj/GYo8XEQSNLc2vNC1QYVfReGA8Q80j0yp/ O+2m2X2Mr4/4vcTRxdmQ0w08DTwHhT4PLoopHJMaxS1IvzvSvrq8XRma96MllJ6cfU21 kCcqePhLXSAiqMWf8FWCFJmcCEiXuLsamz/WD3+nSb50xD+b30BJjpKzPbWe8XpMeDA+ 1XRwA+hrQaXnXpvbOa59bIbJlOHTB2HB01Zp75Oo++V/IYuW/3KSWzNvMszIB6o3cdrK cdPhVhC/8fIuTfpQNtFxNtnK1e3uRhdgba40NDhtLNp4b3KqOkdHdGolYlKXBFgru1aG WvPw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o3si3097702oib.67.2019.12.09.01.24.23; Mon, 09 Dec 2019 01:24:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727398AbfLIIoi (ORCPT + 99 others); Mon, 9 Dec 2019 03:44:38 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:58011 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727047AbfLIIoh (ORCPT ); Mon, 9 Dec 2019 03:44:37 -0500 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ieEee-0007WR-G5; Mon, 09 Dec 2019 09:44:32 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1ieEed-0002y7-Ri; Mon, 09 Dec 2019 09:44:31 +0100 From: Oleksij Rempel To: Shawn Guo , Sascha Hauer Cc: Oleksij Rempel , kernel@pengutronix.de, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Fabio Estevam Subject: [PATCH v1] ARM i.MX6q: make sure PHY fixup for KSZ9031 is applied only on one board Date: Mon, 9 Dec 2019 09:44:30 +0100 Message-Id: <20191209084430.11107-1-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently all board specific fixups defined in mach-imx*.c are not working properly. They are applied on all boards with the same iMX SoC variant and even if: - PHY needs different settings because of different board design - PHY needs different settings if it is not connected directly to the SoC. For example, the PHY is connected to a switch and the switch is connected to the SoC. Since most PHY drivers don't know about changed default settings, these settings will not be restored by the PHY driver after reset or suspend/resume cycle. This patch changes the MICREL KSZ9031 fixup, which was introduced for the "Data Modul eDM-QMX6" board in following patch, to be only activated for this specific board. |commit dbf6719a4a080669acb5087893704586c791aa41 |Author: Sascha Hauer |Date: Thu Jun 20 17:34:33 2013 +0200 | | ARM: i.MX6: add ethernet phy fixup for KSZ9031 | | The KSZ9031 is used on the i.MX6 based Data Modul eDM-QMX6 | board. It needs the same fixup to the rx/tx delays as other | i.MX6 boards. If some board was working by accident with this fixup, it will probably break and should be fixed properly by setting related device tree properties. To fix this properly the "eDM-QMX6" devicetree: arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts should have board specific *-skew-ps properties. See: Documentation/devicetree/bindings/net/micrel-ksz90x1.txt Cc: Sascha Hauer Signed-off-by: Oleksij Rempel --- arch/arm/mach-imx/mach-imx6q.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 6441281cf4f2..2370cb5d8501 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -162,11 +162,19 @@ static int ar8035_phy_fixup(struct phy_device *dev) static void __init imx6q_enet_phy_init(void) { + /* Warning: please do not extend this fixup list. This fixups are + * applied even on boards where related PHY is not directly connected + * to the ethernet controller. For example with switch in the middle. + */ if (IS_BUILTIN(CONFIG_PHYLIB)) { phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); - phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, - ksz9031rn_phy_fixup); + + if (of_machine_is_compatible("dmo,imx6q-edmqmx6")) + phy_register_fixup_for_uid(PHY_ID_KSZ9031, + MICREL_PHY_ID_MASK, + ksz9031rn_phy_fixup); + phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef, ar8031_phy_fixup); phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef, -- 2.24.0