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From:   <Eugen.Hristev@microchip.com>
To:     <robh@kernel.org>, <Ludovic.Desroches@microchip.com>,
        <wsa@the-dreams.de>
CC:     <peda@axentia.se>, <linux-i2c@vger.kernel.org>,
        <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <Codrin.Ciubotariu@microchip.com>,
        <Eugen.Hristev@microchip.com>
Subject: [PATCH v3 2/4] i2c: at91: fix clk_offset for sam9x60
Thread-Topic: [PATCH v3 2/4] i2c: at91: fix clk_offset for sam9x60
Thread-Index: AQHVrno3b8eARagF1kiSyPsN52C7IA==
Date:   Mon, 9 Dec 2019 10:20:02 +0000
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From: Eugen Hristev <eugen.hristev@microchip.com>

In SAM9X60 datasheet, FLEX_TWI_CWGR register description mentions clock
offset of 3 cycles (compared to 4 in eg. SAMA5D3).
This is the same offset as in SAMA5D2.

Fixes: b00277923743 ("i2c: at91: add new platform support for sam9x60")
Suggested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
Changes in v3:
- fixed typo in commit description

Changes in v2:
- Sorry, wrong subject line. Modified to SAM9X60 .


 drivers/i2c/busses/i2c-at91-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at=
91-core.c
index e13af48..5137e62 100644
--- a/drivers/i2c/busses/i2c-at91-core.c
+++ b/drivers/i2c/busses/i2c-at91-core.c
@@ -174,7 +174,7 @@ static struct at91_twi_pdata sama5d2_config =3D {
=20
 static struct at91_twi_pdata sam9x60_config =3D {
 	.clk_max_div =3D 7,
-	.clk_offset =3D 4,
+	.clk_offset =3D 3,
 	.has_unre_flag =3D true,
 	.has_alt_cmd =3D true,
 	.has_hold_field =3D true,
--=20
2.7.4