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([2001:b07:6468:f312:e9bb:92e9:fcc3:7ba9]) by smtp.gmail.com with ESMTPSA id g2sm1496891wrw.76.2019.12.11.01.07.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Dec 2019 01:07:55 -0800 (PST) Subject: Re: [PATCH v2] KVM: x86: use CPUID to locate host page table reserved bits To: "Huang, Kai" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Cc: "Christopherson, Sean J" , "stable@vger.kernel.org" References: <1575474037-7903-1-git-send-email-pbonzini@redhat.com> <8f7e3e87-15dc-2269-f5ee-c3155f91983c@amd.com> <7b885f53-e0d3-2036-6a06-9cdcbb738ae2@redhat.com> <3efabf0da4954239662e90ea08d99212a654977a.camel@intel.com> From: Paolo Bonzini Message-ID: <62438ac9-e186-32a7-d12f-5806054d56b2@redhat.com> Date: Wed, 11 Dec 2019 10:07:55 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <3efabf0da4954239662e90ea08d99212a654977a.camel@intel.com> Content-Language: en-US X-MC-Unique: 5yr6ZlW0PUa1ibMDGNfRww-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/12/19 01:11, Huang, Kai wrote: >> kvm_get_shadow_phys_bits() must be conservative in that: >> >> 1) if a bit is reserved it _can_ return a value higher than its index >> >> 2) if a bit is used by the processor (for physical address or anything >> else) it _must_ return a value higher than its index. >> >> In the SEV case we're not obeying (2), because the function returns 43 >> when the C bit is bit 47. The patch fixes that. > Could we guarantee that C-bit is always below bits reported by CPUID? That's a question for AMD. :) The C bit can move (and probably will, otherwise they wouldn't have bothered adding it to CPUID) in future generations of the processor. Paolo