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[70.163.223.149]) by smtp.gmail.com with ESMTPSA id x16sm1263627qki.110.2019.12.11.17.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 17:50:09 -0800 (PST) Date: Wed, 11 Dec 2019 18:49:52 -0700 From: Jerry Snitselaar To: Lu Baolu Cc: Joerg Roedel , David Woodhouse , ashok.raj@intel.com, jacob.jun.pan@intel.com, kevin.tian@intel.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH 1/1] iommu/vt-d: Fix dmar pte read access not set error Message-ID: <20191212014952.vlrmxrk2cebwxjnp@cantor> Reply-To: Jerry Snitselaar Mail-Followup-To: Lu Baolu , Joerg Roedel , David Woodhouse , ashok.raj@intel.com, jacob.jun.pan@intel.com, kevin.tian@intel.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20191211014015.7898-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Disposition: inline In-Reply-To: <20191211014015.7898-1-baolu.lu@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed Dec 11 19, Lu Baolu wrote: >If the default DMA domain of a group doesn't fit a device, it >will still sit in the group but use a private identity domain. >When map/unmap/iova_to_phys come through iommu API, the driver >should still serve them, otherwise, other devices in the same >group will be impacted. Since identity domain has been mapped >with the whole available memory space and RMRRs, we don't need >to worry about the impact on it. > >Link: https://www.spinics.net/lists/iommu/msg40416.html >Cc: Jerry Snitselaar >Reported-by: Jerry Snitselaar >Fixes: 942067f1b6b97 ("iommu/vt-d: Identify default domains replaced with private") >Cc: stable@vger.kernel.org # v5.3+ >Signed-off-by: Lu Baolu Reviewed-by: Jerry Snitselaar >--- > drivers/iommu/intel-iommu.c | 8 -------- > 1 file changed, 8 deletions(-) > >diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c >index 0c8d81f56a30..b73bebea9148 100644 >--- a/drivers/iommu/intel-iommu.c >+++ b/drivers/iommu/intel-iommu.c >@@ -5478,9 +5478,6 @@ static int intel_iommu_map(struct iommu_domain *domain, > int prot = 0; > int ret; > >- if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN) >- return -EINVAL; >- > if (iommu_prot & IOMMU_READ) > prot |= DMA_PTE_READ; > if (iommu_prot & IOMMU_WRITE) >@@ -5523,8 +5520,6 @@ static size_t intel_iommu_unmap(struct iommu_domain *domain, > /* Cope with horrid API which requires us to unmap more than the > size argument if it happens to be a large-page mapping. */ > BUG_ON(!pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level)); >- if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN) >- return 0; > > if (size < VTD_PAGE_SIZE << level_to_offset_bits(level)) > size = VTD_PAGE_SIZE << level_to_offset_bits(level); >@@ -5556,9 +5551,6 @@ static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, > int level = 0; > u64 phys = 0; > >- if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN) >- return 0; >- > pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level); > if (pte) > phys = dma_pte_addr(pte); >-- >2.17.1 >