Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp975483ybl; Thu, 12 Dec 2019 07:49:38 -0800 (PST) X-Google-Smtp-Source: APXvYqxAPUKzfyv7R4TxgsA0fkJ+n7KUD0EgsCuNnSw4Wk19IAEtb4ZXXl9Q0SzbhdKphZZwq8VF X-Received: by 2002:a05:6808:285:: with SMTP id z5mr5501832oic.127.1576165777932; Thu, 12 Dec 2019 07:49:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576165777; cv=none; d=google.com; s=arc-20160816; b=tN5B9Cf43SO79Icj8CvCQTweFHCgTPqso5416ty1OHYbX3tWBAAQfyIz6tk08VbPVt 26wGF1OusxN2maD5vrxJe+Sd7fgHj+uItJHNIUB+EhEnYprVAPPWX7PPXcDqa9v52Ack JRiPKAHch+Z7KUY2PLEm8s0zLldOECl5ciDBOlDRDsuiIVKABOzW3nHfdQ1IwnnqZYI4 +8wRiiuth98eoVd0qEjI4e5YnsJKuruiRLIB0NzrAokKAjC7i57HIwsUUswvjBdS+FyK Ogh/+7nFziOUVin7iozNdUKS5AkivEX/L/3y3PwPJHY3EGs971P2P5b7Va1IwtOZsi2d ejBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:in-reply-to :subject:cc:to:from:user-agent:references:dkim-signature; bh=ZSDD0/glpJ1MgC2m3fsC6RmNqv5qfMCzBU/Ws2SvIi8=; b=NdYLaz3qwmUj6n7XihHz97/IQOckKi8UxmY3gk+m0PXiPkTCYzfOSdP3CRIq74NCJT ksdesliXS/sK2cgFj8UGcQHAf/JziY/fLeC1W6lhcloLOQS5Tcu3RIJg3Qa/5fGsmz2x weR0IU/mjUNYcCQ0cfo2JvbZTXkDyRvdJUcBuaFri2d7pCx9QGr/8Ft/blNzLceCcFu5 qzZiOnEXytxwrfV/JyfMitNQJsRAtz6TL35oQ8ERqFhtWLetAASwNJesW9FcrlcAZXd2 vVjy78SiBJEf3OmGdEDpnWe4q3wqIi53ChW8IOpYdRiJenyALEagslMXZGBT95mynTlg HL2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=uBvEJvm6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t185si3279868oib.39.2019.12.12.07.49.25; Thu, 12 Dec 2019 07:49:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=uBvEJvm6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729509AbfLLPsW (ORCPT + 99 others); Thu, 12 Dec 2019 10:48:22 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:33622 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729013AbfLLPsW (ORCPT ); Thu, 12 Dec 2019 10:48:22 -0500 Received: by mail-wm1-f65.google.com with SMTP id d139so3913562wmd.0 for ; Thu, 12 Dec 2019 07:48:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=references:user-agent:from:to:cc:subject:in-reply-to:date :message-id:mime-version; bh=ZSDD0/glpJ1MgC2m3fsC6RmNqv5qfMCzBU/Ws2SvIi8=; b=uBvEJvm6xdv/CK4SU85EVr9Mxaq6c28Tocn0XUIdJ+tDyPSZrt0IRxbFwAAZ62yiW5 9KQVcubwDSY+6CA8hl1fFj9eJov2sRbL/5ESoQ/0bw8vPsA8+jUb149QEZlxiuaHM6gO xfkZyTDKaqE4d4r+JCCuwBQv5GWOYOFYudxnuQu6fjI/B0PJXfRn/Ehp46d3CgXQXCiK gbIwUpYQ3S+yRiAnpcjUPo8nO5nRZFvC9OK58nUPRUiv//D0JhQBh+VSvn4UN2UHfPTp R8xFcowCLsIU3cJ/DPXOlSpTfYNh12UTR1/DeTmqbb1LcZYE2U5lMvCreTJgZ3l4ZzUY o+PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:references:user-agent:from:to:cc:subject :in-reply-to:date:message-id:mime-version; bh=ZSDD0/glpJ1MgC2m3fsC6RmNqv5qfMCzBU/Ws2SvIi8=; b=kG2ILE1MSMrBf50/PpQCO9cBb+elVsUxtK0cfF11x30lnrR4r9JM5pDCn+Gyvm0feS 8qbNI7dxHWpinUxRnNo+HxrXfMcAOnsBVPGkDtNl+QPuNT2RyUJLKk9zNqm4rZCMcZI/ nNGi5Br5WPIflW7iggXHK7FayDVtk8c6yuK1l6kKTPBoWkNO+aJfVyhtOPZOCHXLBsI6 kwlPOESo5tWbZaKEonFw62bqmwi81OwVK2d6n4MpP4D7Zunx6/IwBgYXT5bXaTGq4wov y5zifgNMV3xBlcyK6R4eScdSFg0hIyez6Um8ZuE/zvCOcimJpf1J+KvSM7ekz1R1byIT GARQ== X-Gm-Message-State: APjAAAVXj1mr6wpRfQt6A0K82VCSOV/ypVNO1kFRitcr5wsC/NJ2g6pf 8LgaBRAiFJKcllGZv6906Ie8JwC/AMM= X-Received: by 2002:a1c:3141:: with SMTP id x62mr7208553wmx.18.1576165700213; Thu, 12 Dec 2019 07:48:20 -0800 (PST) Received: from localhost (cag06-3-82-243-161-21.fbx.proxad.net. [82.243.161.21]) by smtp.gmail.com with ESMTPSA id b17sm6464442wrp.49.2019.12.12.07.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Dec 2019 07:48:19 -0800 (PST) References: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, khilman@baylibre.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] ARM: dts: meson: clock updates In-reply-to: <20191208180525.1076152-1-martin.blumenstingl@googlemail.com> Date: Thu, 12 Dec 2019 16:48:18 +0100 Message-ID: <1j8snhbl4t.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-)