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Fri, 13 Dec 2019 04:44:11 -0500 (EST) Date: Fri, 13 Dec 2019 10:44:09 +0100 From: Maxime Ripard To: Kevin Tang Cc: airlied@linux.ie, daniel@ffwll.ch, orsonzhai@gmail.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhang.lyra@gmail.com, baolin.wang@linaro.org Subject: Re: [PATCH RFC 3/8] dt-bindings: display: add Unisoc's dpu bindings Message-ID: <20191213094409.lvvhwtxl4vlkvi6b@gilmour.lan> References: <1575966995-13757-1-git-send-email-kevin3.tang@gmail.com> <1575966995-13757-4-git-send-email-kevin3.tang@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="xmgykvho46e6yds2" Content-Disposition: inline In-Reply-To: <1575966995-13757-4-git-send-email-kevin3.tang@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --xmgykvho46e6yds2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Tue, Dec 10, 2019 at 04:36:30PM +0800, Kevin Tang wrote: > From: Kevin Tang > > DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs > which transfers the image data from a video memory buffer to an internal > LCD interface. > > Cc: Orson Zhai > Cc: Baolin Wang > Cc: Chunyan Zhang > Signed-off-by: Kevin Tang > --- > .../devicetree/bindings/display/sprd/dpu.txt | 55 ++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.txt > > diff --git a/Documentation/devicetree/bindings/display/sprd/dpu.txt b/Documentation/devicetree/bindings/display/sprd/dpu.txt > new file mode 100644 > index 0000000..25cbf8e > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/sprd/dpu.txt > @@ -0,0 +1,55 @@ > +Unisoc SoC Display Processor Unit (DPU) > +============================================================================ > + > +DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs > +which transfers the image data from a video memory buffer to an internal > +LCD interface. > + > +Required properties: > + - compatible: value should be "sprd,display-processor"; > + - reg: physical base address and length of the DPU registers set. > + - interrupts: the interrupt signal from DPU. > + - clocks: must include clock specifiers corresponding to entries in the > + clock-names property. > + - clock-names: list of clock names sorted in the same order as the clocks > + property. Same story, this should be a YAML schemas, but here you should describe what the expected clock-names are, and what clock they represent. > + - dma-coherent: with this property, the dpu driver can allocate large and > + continuous memorys. > + - port: a port node with endpoint definitions as defined in document [1]. So only one? Connected to what? Maxime --xmgykvho46e6yds2 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXfNdaQAKCRDj7w1vZxhR xRZkAQDkkC17ANn/69CaZbSnHiWEbolmYloHcKTq/lk8Qtqd+wEAhPyfDMSoPcf5 jkGbaka5QNRk6dAHQtPx3hk7RtwlXQs= =jNnp -----END PGP SIGNATURE----- --xmgykvho46e6yds2--