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[209.132.180.67]) by mx.google.com with ESMTP id l19si4652653oib.48.2019.12.13.01.56.02; Fri, 13 Dec 2019 01:56:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726141AbfLMJzL (ORCPT + 99 others); Fri, 13 Dec 2019 04:55:11 -0500 Received: from mx2.suse.de ([195.135.220.15]:50010 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725799AbfLMJzL (ORCPT ); Fri, 13 Dec 2019 04:55:11 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 4FA82AFC2; Fri, 13 Dec 2019 09:55:09 +0000 (UTC) Subject: Re: [PATCH] x86-64/entry: add instruction suffix to SYSRET To: Andy Lutomirski Cc: the arch/x86 maintainers , lkml References: <08B92B44-CCA9-4B83-B9CC-F1601D44B73F@amacapital.net> <0053f606-f4f7-3951-f40b-b7bd08703590@suse.com> From: Jan Beulich Message-ID: Date: Fri, 13 Dec 2019 10:55:31 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.9.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12.12.2019 22:43, Andy Lutomirski wrote: > On Tue, Dec 10, 2019 at 7:40 AM Jan Beulich wrote: >> >> On 10.12.2019 16:29, Andy Lutomirski wrote: >>>> On Dec 10, 2019, at 2:48 AM, Jan Beulich wrote: >>>> >>>> Omitting suffixes from instructions in AT&T mode is bad practice when >>>> operand size cannot be determined by the assembler from register >>>> operands, and is likely going to be warned about by upstream gas in the >>>> future. Add the missing suffix here. >>>> >>>> Signed-off-by: Jan Beulich >>>> >>>> --- a/arch/x86/entry/entry_64.S >>>> +++ b/arch/x86/entry/entry_64.S >>>> @@ -1728,7 +1728,7 @@ END(nmi) >>>> SYM_CODE_START(ignore_sysret) >>>> UNWIND_HINT_EMPTY >>>> mov $-ENOSYS, %eax >>>> - sysret >>>> + sysretl >>> >>> Isn’t the default sysretq? sysretl looks more correct, but that suggests >>> that your changelog is wrong. >> >> No, this is different from ret, and more like iret and lret. >> >>> Is this code even reachable? >> >> Yes afaict, supported by the comment ahead of the symbol. syscall_init() >> puts its address into MSR_CSTAR when !IA32_EMULATION. >> > > What I meant was: can a program actually get itself into 32-bit mode > to execute a 32-bit SYSCALL instruction? Why not? It can set up a 32-bit code segment descriptor, far-branch into it, and then execute SYSCALL. I can't see anything preventing this in the logic involved in descriptor adjustment system calls. In fact it looks to be at least partly the opposite - fill_ldt() disallows creation of 64-bit code segments (oddly enough fill_user_desc() then still copies the bit back, despite there apparently being no way for it to get set). > Anyway, the change itself is Acked-by: Andy Lutomirski > > But let's please clarify the changelog: > > ignore_sysret contains an unsuffixed 'sysret' instruction. gas > correctly interprets this as sysretl, but leaving it up to gas to > guess when there is no register operand that implies a size is bad > practice, and upstream gas is likely to warn about this in the future. > Use 'sysretl' explicitly. This does not change the assembled output. Fine with me, changed. Jan