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Thu, 19 Dec 2019 17:56:08 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas1p1.samsung.com (KnoxPortal) with ESMTPA id 20191219085608epcas1p19d65ee459ccd5a4801be63d4297a4b81~huewtq8hz2000420004epcas1p1N; Thu, 19 Dec 2019 08:56:08 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20191219085608epsmtrp13dece5a58f26f2b756bcb27ff3929206~huewsspqf0913909139epsmtrp1m; Thu, 19 Dec 2019 08:56:08 +0000 (GMT) X-AuditID: b6c32a39-14bff7000001c829-77-5dfb3b287d55 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id F5.1C.06569.82B3BFD5; Thu, 19 Dec 2019 17:56:08 +0900 (KST) Received: from [10.113.221.102] (unknown [10.113.221.102]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20191219085608epsmtip275ae095672c6bd6181c6fdf08d295817~huewZrxxE2793927939epsmtip26; Thu, 19 Dec 2019 08:56:08 +0000 (GMT) Subject: Re: [PATCH 1/2] ARM: dts: exynos: Move bus related OPPs to the boards DTS To: Marek Szyprowski , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Cc: Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Kamil Konieczny From: Chanwoo Choi Organization: Samsung Electronics Message-ID: <13e06691-feed-de06-cf7a-af628e73df95@samsung.com> Date: Thu, 19 Dec 2019 18:02:41 +0900 User-Agent: Mozilla/5.0 (X11; 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charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20191219082939eucas1p248ca8b95ede6f2704b83515f461f6927 References: <20191219082927.11898-1-m.szyprowski@samsung.com> <20191219082927.11898-2-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marek, On 12/19/19 5:29 PM, Marek Szyprowski wrote: > Currently the only Exynos5422-based boards that support bus frequency > scaling are Hardkernel's Odroid XU3/XU4/HC1. Move the bus related OPPs to > the boards DTS, because those OPPs heavily depend on the clock topology > and top PLL rates, which are being configured by the board's bootloader. > > Signed-off-by: Marek Szyprowski > --- > arch/arm/boot/dts/exynos5420.dtsi | 259 ----------------- > arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 261 +++++++++++++++++- > 2 files changed, 260 insertions(+), 260 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index f95567bc10e3..f66a2d1b3428 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -1092,7 +1092,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK400_WCORE>; > clock-names = "bus"; > - operating-points-v2 = <&bus_wcore_opp_table>; > status = "disabled"; > }; > > @@ -1100,7 +1099,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK100_NOC>; > clock-names = "bus"; > - operating-points-v2 = <&bus_noc_opp_table>; > status = "disabled"; > }; > > @@ -1108,7 +1106,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_PCLK200_FSYS>; > clock-names = "bus"; > - operating-points-v2 = <&bus_fsys_apb_opp_table>; > status = "disabled"; > }; > > @@ -1116,7 +1113,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK200_FSYS>; > clock-names = "bus"; > - operating-points-v2 = <&bus_fsys_apb_opp_table>; > status = "disabled"; > }; > > @@ -1124,7 +1120,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; > clock-names = "bus"; > - operating-points-v2 = <&bus_fsys2_opp_table>; > status = "disabled"; > }; > > @@ -1132,7 +1127,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK333>; > clock-names = "bus"; > - operating-points-v2 = <&bus_mfc_opp_table>; > status = "disabled"; > }; > > @@ -1140,7 +1134,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK266>; > clock-names = "bus"; > - operating-points-v2 = <&bus_gen_opp_table>; > status = "disabled"; > }; > > @@ -1148,7 +1141,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK66>; > clock-names = "bus"; > - operating-points-v2 = <&bus_peri_opp_table>; > status = "disabled"; > }; > > @@ -1156,7 +1148,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK333_G2D>; > clock-names = "bus"; > - operating-points-v2 = <&bus_g2d_opp_table>; > status = "disabled"; > }; > > @@ -1164,7 +1155,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK266_G2D>; > clock-names = "bus"; > - operating-points-v2 = <&bus_g2d_acp_opp_table>; > status = "disabled"; > }; > > @@ -1172,7 +1162,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK300_JPEG>; > clock-names = "bus"; > - operating-points-v2 = <&bus_jpeg_opp_table>; > status = "disabled"; > }; > > @@ -1180,7 +1169,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK166>; > clock-names = "bus"; > - operating-points-v2 = <&bus_jpeg_apb_opp_table>; > status = "disabled"; > }; > > @@ -1188,7 +1176,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK300_DISP1>; > clock-names = "bus"; > - operating-points-v2 = <&bus_disp1_fimd_opp_table>; > status = "disabled"; > }; > > @@ -1196,7 +1183,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK400_DISP1>; > clock-names = "bus"; > - operating-points-v2 = <&bus_disp1_opp_table>; > status = "disabled"; > }; > > @@ -1204,7 +1190,6 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK300_GSCL>; > clock-names = "bus"; > - operating-points-v2 = <&bus_gscl_opp_table>; > status = "disabled"; > }; > > @@ -1212,252 +1197,8 @@ > compatible = "samsung,exynos-bus"; > clocks = <&clock CLK_DOUT_ACLK400_MSCL>; > clock-names = "bus"; > - operating-points-v2 = <&bus_mscl_opp_table>; > status = "disabled"; > }; > - > - bus_wcore_opp_table: opp_table2 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <84000000>; > - opp-microvolt = <925000 925000 1400000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <111000000>; > - opp-microvolt = <950000 950000 1400000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <222000000>; > - opp-microvolt = <950000 950000 1400000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <333000000>; > - opp-microvolt = <950000 950000 1400000>; > - }; > - opp04 { > - opp-hz = /bits/ 64 <400000000>; > - opp-microvolt = <987500 987500 1400000>; > - }; > - }; > - > - bus_noc_opp_table: opp_table3 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <67000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <75000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <86000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <100000000>; > - }; > - }; > - > - bus_fsys_apb_opp_table: opp_table4 { > - compatible = "operating-points-v2"; > - opp-shared; > - > - opp00 { > - opp-hz = /bits/ 64 <100000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <200000000>; > - }; > - }; > - > - bus_fsys2_opp_table: opp_table5 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <75000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <100000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <150000000>; > - }; > - }; > - > - bus_mfc_opp_table: opp_table6 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <96000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <111000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <167000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <222000000>; > - }; > - opp04 { > - opp-hz = /bits/ 64 <333000000>; > - }; > - }; > - > - bus_gen_opp_table: opp_table7 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <89000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <133000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <178000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <267000000>; > - }; > - }; > - > - bus_peri_opp_table: opp_table8 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <67000000>; > - }; > - }; > - > - bus_g2d_opp_table: opp_table9 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <84000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <167000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <222000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <300000000>; > - }; > - opp04 { > - opp-hz = /bits/ 64 <333000000>; > - }; > - }; > - > - bus_g2d_acp_opp_table: opp_table10 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <67000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <133000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <178000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <267000000>; > - }; > - }; > - > - bus_jpeg_opp_table: opp_table11 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <75000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <150000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <200000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <300000000>; > - }; > - }; > - > - bus_jpeg_apb_opp_table: opp_table12 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <84000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <111000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <134000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <167000000>; > - }; > - }; > - > - bus_disp1_fimd_opp_table: opp_table13 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <120000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <200000000>; > - }; > - }; > - > - bus_disp1_opp_table: opp_table14 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <120000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <200000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <300000000>; > - }; > - }; > - > - bus_gscl_opp_table: opp_table15 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <150000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <200000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <300000000>; > - }; > - }; > - > - bus_mscl_opp_table: opp_table16 { > - compatible = "operating-points-v2"; > - > - opp00 { > - opp-hz = /bits/ 64 <84000000>; > - }; > - opp01 { > - opp-hz = /bits/ 64 <167000000>; > - }; > - opp02 { > - opp-hz = /bits/ 64 <222000000>; > - }; > - opp03 { > - opp-hz = /bits/ 64 <333000000>; > - }; > - opp04 { > - opp-hz = /bits/ 64 <400000000>; > - }; > - }; > }; > > thermal-zones { > diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > index 80b0acfec547..663a38d53c9e 100644 > --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > @@ -35,7 +35,250 @@ > }; > }; > > - dmc_opp_table: opp_table2 { > + bus_wcore_opp_table: opp_table2 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <84000000>; > + opp-microvolt = <925000 925000 1400000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <111000000>; > + opp-microvolt = <950000 950000 1400000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <222000000>; > + opp-microvolt = <950000 950000 1400000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <333000000>; > + opp-microvolt = <950000 950000 1400000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <987500 987500 1400000>; > + }; > + }; > + > + bus_noc_opp_table: opp_table3 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <67000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <75000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <86000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <100000000>; > + }; > + }; > + > + bus_fsys_apb_opp_table: opp_table4 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp00 { > + opp-hz = /bits/ 64 <100000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <200000000>; > + }; > + }; > + > + bus_fsys2_opp_table: opp_table5 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <75000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <100000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <150000000>; > + }; > + }; > + > + bus_mfc_opp_table: opp_table6 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <96000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <111000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <167000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <222000000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <333000000>; > + }; > + }; > + > + bus_gen_opp_table: opp_table7 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <89000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <133000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <178000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <267000000>; > + }; > + }; > + > + bus_peri_opp_table: opp_table8 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <67000000>; > + }; > + }; > + > + bus_g2d_opp_table: opp_table9 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <84000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <167000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <222000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <300000000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <333000000>; > + }; > + }; > + > + bus_g2d_acp_opp_table: opp_table10 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <67000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <133000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <178000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <267000000>; > + }; > + }; > + > + bus_jpeg_opp_table: opp_table11 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <75000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <150000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <200000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <300000000>; > + }; > + }; > + > + bus_jpeg_apb_opp_table: opp_table12 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <84000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <111000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <134000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <167000000>; > + }; > + }; > + > + bus_disp1_fimd_opp_table: opp_table13 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <120000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <200000000>; > + }; > + }; > + > + bus_disp1_opp_table: opp_table14 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <120000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <200000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <300000000>; > + }; > + }; > + > + bus_gscl_opp_table: opp_table15 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <150000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <200000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <300000000>; > + }; > + }; > + > + bus_mscl_opp_table: opp_table16 { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <84000000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <167000000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <222000000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <333000000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <400000000>; > + }; > + }; > + > + dmc_opp_table: opp_table18 { opp_table18 -> opp_table17? (snip) Tested-by: Chanwoo Choi Reviewed-by: Chanwoo Choi -- Best Regards, Chanwoo Choi Samsung Electronics