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[209.132.180.67]) by mx.google.com with ESMTP id f81si2923483oig.110.2019.12.19.03.03.05; Thu, 19 Dec 2019 03:03:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=C0W0Svkg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726925AbfLSLBx (ORCPT + 99 others); Thu, 19 Dec 2019 06:01:53 -0500 Received: from mail-qk1-f195.google.com ([209.85.222.195]:46519 "EHLO mail-qk1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726701AbfLSLBx (ORCPT ); Thu, 19 Dec 2019 06:01:53 -0500 Received: by mail-qk1-f195.google.com with SMTP id r14so4246041qke.13 for ; Thu, 19 Dec 2019 03:01:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=r4FrNo5LLEspvU9m0EiGD3eytJBEaYUVyq8SH3ZcE3o=; b=C0W0Svkg0Llp9ZQuiZFYuGlJcklhQKzim592wdhPRyuZfzvO6Sy8GmgRlXLBdYyg8M CnrXmmjidsnz1OPlJ7lXISjmdDSwrtPul+4xso+ezWUJxWZKbQLz/mVUb+ZLF+eH9bTQ u75sjyRdj/GEuKHBsLnLOh9VFM4yqIFq36tZDoF6mvyeqaatSfPS9TCEk4HMmDsOFcz0 WNHxhb1zWXDPywtVLafp3q4kuWplraaVjhNkKR/AiGQMnOon2GZ66zSaq0dyvqUj5U8D WAhrOKJsCtgkz2d5eRKxlVtMQKHP0XMUdWi5RzJITjwMjKCCJmwKqBNgL0SfgwQBAczw lsog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=r4FrNo5LLEspvU9m0EiGD3eytJBEaYUVyq8SH3ZcE3o=; b=HCVMYWHNGCH41rmp3BDqkaYQpzY+hoBssWk5EUFQ8UJUOaX/YQC/YCBBlvWQC2QyVk 0TypE/ODJML0xhrW6PiSEluUtE30YwpUCJpiR/5bw0G5rMcXkl2l0PbjbzicKWeKKVaN 2tLyhl8IzAiZfD/oIInAJQUP5lpjk2RONJnYBzpI77MLpU8qCdkl0JezRaoaQP9bYErb ddOK81qiquo0VzKCe3VDL2QFm9H2Z1QEVfKOGWzhblhMV7zllKrQCLy52CvT7voSnOmN EW7YolqnRlmic7xGbNqa3qq/5MJUkBN4FghapsfTv04nau5SP+r/Rnyxqrj/NhvWbqct boCg== X-Gm-Message-State: APjAAAWrGi5pMfL7yQqBFfqSjqzOgM1d4FJtdVJ4zc0l+QF8hJ84wrxw EXz5ZS3Udgxw3ubhyx3TzZefEERmFDHQ/DbiNMF5Og== X-Received: by 2002:a37:6fc4:: with SMTP id k187mr7098160qkc.21.1576753312007; Thu, 19 Dec 2019 03:01:52 -0800 (PST) MIME-Version: 1.0 References: <20191215183047.9414-1-digetx@gmail.com> <20191215183047.9414-2-digetx@gmail.com> In-Reply-To: <20191215183047.9414-2-digetx@gmail.com> From: Bartosz Golaszewski Date: Thu, 19 Dec 2019 12:01:41 +0100 Message-ID: Subject: Re: [PATCH v1 1/3] gpio: tegra: Use generic readl_relaxed/writel_relaxed accessors To: Dmitry Osipenko Cc: Thierry Reding , Jonathan Hunter , Linus Walleij , linux-gpio , linux-tegra@vger.kernel.org, devel@driverdev.osuosl.org, LKML Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org niedz., 15 gru 2019 o 19:31 Dmitry Osipenko napisa=C5=82= (a): > > There is no point in using old-style raw accessors, the generic accessors > do the same thing and also take into account CPU endianness. Tegra SoCs d= o > not support big-endian mode in the upstream kernel, but let's switch away > from the outdated things anyway, just to keep code up-to-date. > > Signed-off-by: Dmitry Osipenko > --- > drivers/gpio/gpio-tegra.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c > index 6fdfe4c5303e..f6a382fbd12d 100644 > --- a/drivers/gpio/gpio-tegra.c > +++ b/drivers/gpio/gpio-tegra.c > @@ -96,12 +96,12 @@ struct tegra_gpio_info { > static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi, > u32 val, u32 reg) > { > - __raw_writel(val, tgi->regs + reg); > + writel_relaxed(val, tgi->regs + reg); > } > > static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg) > { > - return __raw_readl(tgi->regs + reg); > + return readl_relaxed(tgi->regs + reg); > } > > static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int p= ort, > -- > 2.24.0 > The entire series looks good to me, but I'll wait for Thierry's acks just in case. Bart