Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp2713791ybl; Thu, 19 Dec 2019 19:32:12 -0800 (PST) X-Google-Smtp-Source: APXvYqzS5j1N1FOIjYHRa8ObIvR4D8NMoEeC2Jp/fJdVMOigCnMYyuVO4IPt5ml3xwzfNXveKq5W X-Received: by 2002:a9d:4e97:: with SMTP id v23mr11725854otk.201.1576812732407; Thu, 19 Dec 2019 19:32:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576812732; cv=none; d=google.com; s=arc-20160816; b=nE4b5TEC3KO2569Hsa8gMOBVIyF8SRj2IWwp0h+QYUX44fZ1vsWMsie1N1AImR7Duj U087GgiA9rWTx9LKXLZa87piEXgZM+GehWUd8Dwi5WUPd066R3sjE+WgaLjLK+cgyxGY 0HmpjOXiEigwAIjMhg43sHbRXb6le0tbKUxNdI/E6NjmwIk95ihhFJM6arhSXtCE7BgR kROUL1hi4qUZQaMgRCN69smHA020V7unV0O8J1cle1vZv/iO1OvgaNJe4PTG26zZ2QxN Gwl5J+ErCnU6exWVfgtVlYjfUYVdmQYIZKOARImrH9uc5Wb8Nj+Kt2yWLyOHQ7W/8JdS jH7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=KDJhxB6VetaeEMA54o+dzOlBSYBTFWK7x42A54t3hp8=; b=R9WsTlmUb8zjKRLeSryOxfN3xeUxyfnE7Z2hEhlskMCjlbLH5YJFVtOu7B/6MKht36 7BX/UnGHl048VYMIbxXrc2uhyy73lBn9ezO+EssqhaGrlclLiY2IaaAgnLePiEJjLNGe isIq2wjmpH4evLqt4IhffuJ4A4umBx9WMVLkwfp2+/0fT1iF1zbL8ttfBo4AgvLwtnze EQ6s1+c2kB55PMIych+jucx7bTKZhumkrFiGGgcrOQ02wMUR1aM6AQRG8NN6EfnQulCy QStPV+/GxFoeg+0ZrGPSyAX3hY1RpSFnGq5vYbxocgsBo6Kq+HSqvuxQmrb+/zDCf7RA r9kg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l2si3669976oti.303.2019.12.19.19.32.00; Thu, 19 Dec 2019 19:32:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727285AbfLTDbN (ORCPT + 99 others); Thu, 19 Dec 2019 22:31:13 -0500 Received: from mga04.intel.com ([192.55.52.120]:65387 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726986AbfLTDbN (ORCPT ); Thu, 19 Dec 2019 22:31:13 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Dec 2019 19:31:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,334,1571727600"; d="scan'208";a="222412899" Received: from sgsxdev001.isng.intel.com (HELO localhost) ([10.226.88.11]) by fmsmga001.fm.intel.com with ESMTP; 19 Dec 2019 19:31:10 -0800 From: Rahul Tanwar To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com, yixin.zhu@linux.intel.com, qi-ming.wu@intel.com, Rahul Tanwar Subject: [PATCH v2 0/2] clk: intel: Add a new driver for a new clock controller IP Date: Fri, 20 Dec 2019 11:31:06 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This series adds clock driver for Clock Generation Unit(CGU) of Lightning Mountain(LGM) SoC. Patch 1 adds common clock framework based clock driver for CGU. Patch 2 adds bindings document & include file for CGU. These patches are baselined upon Linux 5.5-rc1 at below Git link: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git v2: - Move the driver to x86 folder. - Remove syscon usage. - Remove regmap based access. Use direct readl()/write() instead. Add spinlocks. - Change all enum values to capitals. - Rename all data structures & functions from intel_* to lgm_*. - Remove multiple header files. Keep only one header file. - Make probe fail when any of the clk/pll registration fails. - Fix few bugs with clk_init_data assignement. - Address review concerns for code quality/style/convention. v1: - Initial version. Rahul Tanwar (1): dt-bindings: clk: intel: Add bindings document & header file for CGU rtanwar (1): clk: intel: Add CGU clock driver for a new SoC .../devicetree/bindings/clock/intel,cgu-lgm.yaml | 43 ++ drivers/clk/Kconfig | 8 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-cgu-pll.c | 194 +++++++ drivers/clk/x86/clk-cgu.c | 559 +++++++++++++++++++++ drivers/clk/x86/clk-cgu.h | 296 +++++++++++ drivers/clk/x86/clk-lgm.c | 351 +++++++++++++ include/dt-bindings/clock/intel,lgm-clk.h | 150 ++++++ 8 files changed, 1602 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 drivers/clk/x86/clk-cgu-pll.c create mode 100644 drivers/clk/x86/clk-cgu.c create mode 100644 drivers/clk/x86/clk-cgu.h create mode 100644 drivers/clk/x86/clk-lgm.c create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h -- 2.11.0