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Message-ID: <186ca73e408654981e08f7f12ae543ba51debb68.camel@v3.sk>
Subject: Re: [PATCH 4/5] ARM: dts: mmp3: Add HSIC controllers
From:   Lubomir Rintel <lkundrak@v3.sk>
To:     Olof Johansson <olof@lixom.net>
Cc:     Arnd Bergmann <arnd@arndb.de>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
        soc@kernel.org
Date:   Fri, 20 Dec 2019 08:05:50 +0100
In-Reply-To: <20191220065314.237624-5-lkundrak@v3.sk>
References: <20191220065314.237624-1-lkundrak@v3.sk>
         <20191220065314.237624-5-lkundrak@v3.sk>
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On Fri, 2019-12-20 at 07:53 +0100, Lubomir Rintel wrote:
> There are two on MMP3, along with the PHYs. The PHYs are made compatible
> with the NOP transceiver, since there's no driver for the time being and
> they're likely configured by the firmware.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---
>  arch/arm/boot/dts/mmp3.dtsi | 44 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi
> index d9762de0ed34b..36c50706e60e0 100644
> --- a/arch/arm/boot/dts/mmp3.dtsi
> +++ b/arch/arm/boot/dts/mmp3.dtsi
> @@ -201,6 +201,50 @@ usb_otg0: usb-otg@d4208000 {
>  				status = "disabled";
>  			};
>  
> +			hsic_phy0: hsic-phy@f0001800 {
> +				compatible = "marvell,mmp3-hsic-phy",
> +					     "usb-nop-xceiv",

I managed to mess this up right before sending it out.     ^^^
Sorry for that. There should be a semicolon there. I'll fix this up on
next patch spin.

> +				reg = <0xf0001800 0x40>;
> +				#phy-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			hsic0: hsic@f0001000 {
> +				compatible = "marvell,pxau2o-ehci";
> +				reg = <0xf0001000 0x200>;
> +				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&soc_clocks MMP2_CLK_USBHSIC0>;
> +				clock-names = "USBCLK";
> +				phys = <&hsic_phy0>;
> +				phy-names = "usb";
> +				phy_type = "hsic";
> +				#address-cells = <0x01>;
> +				#size-cells = <0x00>;
> +				status = "disabled";
> +			};
> +
> +			hsic_phy1: hsic-phy@f0002800 {
> +				compatible = "marvell,mmp3-hsic-phy",
> +					     "usb-nop-xceiv",
> +				reg = <0xf0002800 0x40>;
> +				#phy-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			hsic1: hsic@f0002000 {
> +				compatible = "marvell,pxau2o-ehci";
> +				reg = <0xf0002000 0x200>;
> +				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&soc_clocks MMP2_CLK_USBHSIC1>;
> +				clock-names = "USBCLK";
> +				phys = <&hsic_phy1>;
> +				phy-names = "usb";
> +				phy_type = "hsic";
> +				#address-cells = <0x01>;
> +				#size-cells = <0x00>;
> +				status = "disabled";
> +			};
> +
>  			mmc1: mmc@d4280000 {
>  				compatible = "mrvl,pxav3-mmc";
>  				reg = <0xd4280000 0x120>;