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Subject: Re: [RFC PATCH] powerpc/32: Switch VDSO to C implementation.
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Paul Mackerras <paulus@samba.org>,
        Michael Ellerman <mpe@ellerman.id.au>,
        vincenzo.frascino@arm.com, luto@kernel.org,
        linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
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From:   Christophe Leroy <christophe.leroy@c-s.fr>
Message-ID: <207cef10-3da8-6a52-139c-0620b21b64af@c-s.fr>
Date:   Fri, 20 Dec 2019 19:24:22 +0100
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Hi Thomas,

In do_hres(), I see:

		cycles = __arch_get_hw_counter(vd->clock_mode);
		ns = vdso_ts->nsec;
		last = vd->cycle_last;
		if (unlikely((s64)cycles < 0))
			return -1;

__arch_get_hw_counter() returns a u64 values. On the PPC, this is read 
from the timebase which is a 64 bits counter.

Why returning -1 if (s64)cycles < 0 ? Does it means we have to mask out 
the most significant bit when reading the HW counter ?

Christophe