Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp6226293ybl; Mon, 23 Dec 2019 02:20:52 -0800 (PST) X-Google-Smtp-Source: APXvYqzAgiiLNB4E7aHdZ60VWJP2p0xYFHn0m8EIbAt28Vsxbc3/DzBtP/X5PxDRo+mpN19cMGI6 X-Received: by 2002:a9d:5c86:: with SMTP id a6mr32317985oti.68.1577096452316; Mon, 23 Dec 2019 02:20:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577096452; cv=none; d=google.com; s=arc-20160816; b=NuyY+vuigDM/UusfJaGbbhc/LK/RB44NG/dclR56sR5LwspalP4m5fHfR4Wy5lwQtJ CXHCbnzy3D2YgWM8yYRywvbrwrQjrqiW6caNed8jI1Er/lre3DlFFsd84l/zmuWm11ep IF+w6r1jT4u0HFJMiLoCy6+Wd9U1SQNWWBDST8ypdPwW0xAPvSUg45S+LrSgjMHYR5/J lm/zNJklekI/dA5H7nxfax1v+hvNg7rtvS0B2w0cqMFM3YUHAcq9LWxQliXNxbnN47Yd n+IumqdK+MlXtRWtGvGdr0sMY1q0hd+NHWb1zxWxWaMBx8vsUuS1MjARAoROPdQ+7+LW o0AA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=f+zquSbtyZfZ7apvFopckINpUnp0+VxFFMoV5GJic0k=; b=btcP/y4le2z7wd/cblvuaKnbcbZuiCRecYIsBjSdkmYZpmp+lx27yO6nziwPtC1KLx 52ueTalD8giMqhxJb8PYORnGn/cyDdBGEDk0ofaf+lTp30SNB621XfM4MRtYZcXBhn0y 704D6p2P+C3dXen1VWDck3ciGoL3f87auGy1mcTiw67WAOOvxsPbbLGV9teXYvrbqgsf cEMozOgO1HBPZfK3dgZ5ffMoP0Lza/SfDci4t1RtKV+r+6u90P4GBgjSM+GK3HHhF8RR NBqxjE3S0pVCIpPdpIGWyNyVc0ofopou+71qxxycE41Y2FuZGCPi0q6S+s7Bjube4/ol p7Yg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v25si7939533ote.261.2019.12.23.02.20.39; Mon, 23 Dec 2019 02:20:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726777AbfLWKT4 (ORCPT + 99 others); Mon, 23 Dec 2019 05:19:56 -0500 Received: from alexa-out-blr-02.qualcomm.com ([103.229.18.198]:52868 "EHLO alexa-out-blr-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726090AbfLWKT4 (ORCPT ); Mon, 23 Dec 2019 05:19:56 -0500 Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by alexa-out-blr-02.qualcomm.com with ESMTP/TLS/AES256-SHA; 23 Dec 2019 15:49:52 +0530 Received: from harigovi-linux.qualcomm.com ([10.204.66.157]) by ironmsg01-blr.qualcomm.com with ESMTP; 23 Dec 2019 15:49:30 +0530 Received: by harigovi-linux.qualcomm.com (Postfix, from userid 2332695) id CFC792737; Mon, 23 Dec 2019 15:49:28 +0530 (IST) From: Harigovindan P To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Harigovindan P , linux-kernel@vger.kernel.org, robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org, abhinavk@codeaurora.org, jsanka@codeaurora.org, chandanu@codeaurora.org, nganji@codeaurora.org Subject: [v1] drm/msm: update LANE_CTRL register value from default value Date: Mon, 23 Dec 2019 15:49:21 +0530 Message-Id: <1577096361-8381-1-git-send-email-harigovi@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Updating REG_DSI_LANE_CTRL register value by reading default register value and writing it back using bitwise OR with DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST. This works for all panels. Signed-off-by: Harigovindan P --- drivers/gpu/drm/msm/dsi/dsi_host.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index e6289a3..d3c5233 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -816,7 +816,7 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable, u32 flags = msm_host->mode_flags; enum mipi_dsi_pixel_format mipi_fmt = msm_host->format; const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; - u32 data = 0; + u32 data = 0, lane_ctrl = 0; if (!enable) { dsi_write(msm_host, REG_DSI_CTRL, 0); @@ -904,9 +904,11 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable, dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL, DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(msm_host->dlane_swap)); - if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) + if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) { + lane_ctrl = dsi_read(msm_host, REG_DSI_LANE_CTRL); dsi_write(msm_host, REG_DSI_LANE_CTRL, - DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST); + lane_ctrl | DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST); + } data |= DSI_CTRL_ENABLE; -- 2.7.4