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[209.132.180.67]) by mx.google.com with ESMTP id 77si9498779oie.10.2019.12.23.04.19.06; Mon, 23 Dec 2019 04:19:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726846AbfLWMSR (ORCPT + 99 others); Mon, 23 Dec 2019 07:18:17 -0500 Received: from inca-roads.misterjones.org ([213.251.177.50]:34041 "EHLO inca-roads.misterjones.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726257AbfLWMSQ (ORCPT ); Mon, 23 Dec 2019 07:18:16 -0500 Received: from www-data by cheepnis.misterjones.org with local (Exim 4.80) (envelope-from ) id 1ijMf8-0003iS-Ut; Mon, 23 Dec 2019 13:18:14 +0100 To: Andrew Murray Subject: Re: [PATCH v2 15/18] perf: =?UTF-8?Q?arm=5Fspe=3A=20Handle=20gues?= =?UTF-8?Q?t/host=20exclusion=20flags?= X-PHP-Originating-Script: 0:main.inc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 23 Dec 2019 12:18:14 +0000 From: Marc Zyngier Cc: Marc Zyngier , Catalin Marinas , Will Deacon , , , Sudeep Holla , , In-Reply-To: <20191223121002.GB42593@e119886-lin.cambridge.arm.com> References: <20191220143025.33853-1-andrew.murray@arm.com> <20191220143025.33853-16-andrew.murray@arm.com> <865zi8imr7.wl-maz@kernel.org> <20191223121002.GB42593@e119886-lin.cambridge.arm.com> Message-ID: <0c806e4f5bb465f5b3fb54d167293706@www.loen.fr> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/0.7.2 X-SA-Exim-Connect-IP: X-SA-Exim-Rcpt-To: andrew.murray@arm.com, marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, sudeep.holla@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2019-12-23 12:10, Andrew Murray wrote: > On Sun, Dec 22, 2019 at 12:10:52PM +0000, Marc Zyngier wrote: >> On Fri, 20 Dec 2019 14:30:22 +0000, >> Andrew Murray wrote: >> > >> > A side effect of supporting the SPE in guests is that we prevent >> the >> > host from collecting data whilst inside a guest thus creating a >> black-out >> > window. This occurs because instead of emulating the SPE, we share >> it >> > with our guests. >> > >> > Let's accurately describe our capabilities by using the perf >> exclude >> > flags to prevent !exclude_guest and exclude_host flags from being >> used. >> > >> > Signed-off-by: Andrew Murray >> > --- >> > drivers/perf/arm_spe_pmu.c | 3 +++ >> > 1 file changed, 3 insertions(+) >> > >> > diff --git a/drivers/perf/arm_spe_pmu.c >> b/drivers/perf/arm_spe_pmu.c >> > index 2d24af4cfcab..3703dbf459de 100644 >> > --- a/drivers/perf/arm_spe_pmu.c >> > +++ b/drivers/perf/arm_spe_pmu.c >> > @@ -679,6 +679,9 @@ static int arm_spe_pmu_event_init(struct >> perf_event *event) >> > if (attr->exclude_idle) >> > return -EOPNOTSUPP; >> > >> > + if (!attr->exclude_guest || attr->exclude_host) >> > + return -EOPNOTSUPP; >> > + >> >> I have the opposite approach. If the host decides to profile the >> guest, why should that be denied? If there is a black hole, it >> should >> take place in the guest. Today, the host does expect this to work, >> and >> there is no way that we unconditionally allow it to regress. > > That seems reasonable. > > Upon entering the guest we'd have to detect if the host is using SPE, > and if > so choose not to restore the guest registers. Instead we'd have to > trap them > and let the guest read/write emulated values until the host has > finished with > SPE - at which time we could restore the guest SPE registers to > hardware. > > Does that approach make sense? Yes, this would be much better. All of this can be found out at vcpu_load() time, and once you've moved most of the SPE sysreg handling there, it will just follow the normal scheduling flow. M. -- Jazz is not dead. It just smells funny...