Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp7820067ybl; Tue, 24 Dec 2019 09:33:40 -0800 (PST) X-Google-Smtp-Source: APXvYqywKWsL2TjuMS1oLLhopmwcB7shJxX320ix1gUgMOKeHiTNiluijwp3DDr2aJnAcRqxkWYf X-Received: by 2002:a9d:6005:: with SMTP id h5mr41349435otj.153.1577208820652; Tue, 24 Dec 2019 09:33:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577208820; cv=none; d=google.com; s=arc-20160816; b=PmjqWJgM2u2wFbJnDjDkSy86UY0hmiVhqkXGE0pU/+8/axkvPJmV0rEBZxGeHTFqN2 /cWa9yYW+pb7UM0uoDzqo1cwyY4DlQefc1nQQ+UUZabwNQ5D43GoEAgZKcLWxiUTrvV1 96uIaZXLZ7S9YpQodQMw80zN/brvZGFWRN/GUnx+8z2tMBxJE5zjrUeGO/P5XpF5+zvg OBKuhvPLHtQvx6cwfZy3B/P4dhPnjyd3YvEoJm3iCZnOAw43B3xqhpPnCyg/Qc2eoNu/ Ut+n2FjlvR1yObHPy5vwqS1Ym5D80+luuc80yIC7z4PfMVP5WdlSaw2qT72+9HfZ7YiU HTHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xnl8EJ+BBcb5kaR8NnULbGpgl0xXsweZRAq9q6XvHSg=; b=teUkckeJkNQtO0DpUE4FqmRzKpksvo5dYgtsJmkxLuUagG6rtfx5jkgera5Dq7Z20m opDC89aFXZHA/Cc+ZW7661fMKDAjx4odJyIbxsrtBFpUG7IMrD4I4+7xVsciAZi50Fhk g8t3lDD2ZvpHUJOOGZVJNwjOZzKa4J6z3nyKGec7fecA1otL5P7V3bh0uHi+9a9miGP8 X0/l/OOLOR+MsZ2GvrRSmsq6nCTFUSmAU76yu1PNL7b4I9uRR23tjaD/JJB19qP/Tril HzANNBRb8xCpNJmG5kysTgDdTOdXnmV1LBKZI9sEI5PJ4p0hhy8PE24VsKbYKxP32mhE ArKw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b24si12218837otf.34.2019.12.24.09.33.28; Tue, 24 Dec 2019 09:33:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726885AbfLXRcV (ORCPT + 99 others); Tue, 24 Dec 2019 12:32:21 -0500 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:54775 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726171AbfLXRcV (ORCPT ); Tue, 24 Dec 2019 12:32:21 -0500 X-Originating-IP: 88.190.179.123 Received: from localhost (unknown [88.190.179.123]) (Authenticated sender: repk@triplefau.lt) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 41D6D20005; Tue, 24 Dec 2019 17:32:18 +0000 (UTC) From: Remi Pommarel To: Kishon Vijay Abraham I , Yue Wang , Lorenzo Pieralisi , Andrew Murray , Neil Armstrong , Kevin Hilman , Martin Blumenstingl Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Remi Pommarel , devicetree@vger.kernel.org Subject: [PATCH v3 3/5] arm64: dts: meson-axg: Add PCIE PHY node Date: Tue, 24 Dec 2019 18:39:40 +0100 Message-Id: <20191224173942.18160-4-repk@triplefau.lt> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191224173942.18160-1-repk@triplefau.lt> References: <20191224173942.18160-1-repk@triplefau.lt> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable PCIE PHY node to make PCIE reliable on AXG SoC. Signed-off-by: Remi Pommarel --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 04803c3bccfa..e679ef26ab79 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1356,6 +1356,15 @@ tdmout_c: audio-controller@580 { }; }; + pcie_phy: pcie-phy@ff644000 { + compatible = "amlogic,axg-pcie-phy"; + reg = <0x0 0xff644000 0x0 0x2000>; + aml,hhi-gpr = <&sysctrl>; + resets = <&reset RESET_PCIE_PHY>; + reset-names = "phy"; + #phy-cells = <0>; + }; + aobus: bus@ff800000 { compatible = "simple-bus"; reg = <0x0 0xff800000 0x0 0x100000>; -- 2.24.0