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[209.132.180.67]) by mx.google.com with ESMTP id v25si10360456ote.261.2019.12.24.13.35.47; Tue, 24 Dec 2019 13:36:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=oHPyy4eP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726256AbfLXVcD (ORCPT + 99 others); Tue, 24 Dec 2019 16:32:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:58214 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726216AbfLXVcD (ORCPT ); Tue, 24 Dec 2019 16:32:03 -0500 Received: from mail-qt1-f170.google.com (mail-qt1-f170.google.com [209.85.160.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6AE42206D7; Tue, 24 Dec 2019 21:32:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1577223122; bh=PW26vJkEN6uyM1jLVMnYbaWn5MmZ8bT2hZKZaiAyDbQ=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=oHPyy4ePIKxjx+iXoUJKf+1O102P0tZM7ugK49hOGsy0ZK/THY8EMhs8SUdm8Cw7A DcqjoW/LY/Brbfp7IbjClouB5vmuP3feeoZmJmPMOCgGc0bCvHODlqzKRWm43K/VYg BCN9rD9OKk0zWtmdAeni78IZuDTYGJL9trpODlN8= Received: by mail-qt1-f170.google.com with SMTP id d5so19021016qto.0; Tue, 24 Dec 2019 13:32:02 -0800 (PST) X-Gm-Message-State: APjAAAUCb2mLKUHWvJWudIHVGhjTuLkvdcwI5dPGCQlRRyJqVhWIwY1x BFiCeJCTuJ6NyW88M222MFc9FFiKrHqwkS2BLQ== X-Received: by 2002:ac8:1415:: with SMTP id k21mr14221841qtj.300.1577223121574; Tue, 24 Dec 2019 13:32:01 -0800 (PST) MIME-Version: 1.0 References: <20191219190833.GA16358@bogus> <3cf64e30-6b4d-a138-7164-54d1cdc8e05a@ti.com> In-Reply-To: <3cf64e30-6b4d-a138-7164-54d1cdc8e05a@ti.com> From: Rob Herring Date: Tue, 24 Dec 2019 14:31:49 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/3] dt-bindings: phy: Add lane-mode property to WIZ (SERDES wrapper) To: Jyri Sarha Cc: Kishon Vijay Abraham I , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, Tomi Valkeinen , Praneeth Bajjuri , Yuti Amonkar , Swapnil Kashinath Jakhade , Roger Quadros Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 20, 2019 at 5:52 AM Jyri Sarha wrote: > > On 19/12/2019 21:08, Rob Herring wrote: > > On Mon, Dec 09, 2019 at 06:22:11PM +0200, Jyri Sarha wrote: > >> Add property to indicate the usage of SERDES lane controlled by the > >> WIZ wrapper. The wrapper configuration has some variation depending on > >> how each lane is going to be used. > >> > >> Signed-off-by: Jyri Sarha > >> --- > >> .../devicetree/bindings/phy/ti,phy-j721e-wiz.yaml | 12 ++++++++++++ > >> 1 file changed, 12 insertions(+) > >> > >> diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml > >> index 94e3b4b5ed8e..399725f65278 100644 > >> --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml > >> +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml > >> @@ -97,6 +97,18 @@ patternProperties: > >> Torrent SERDES should follow the bindings specified in > >> Documentation/devicetree/bindings/phy/phy-cadence-dp.txt > >> > >> + "^lane[1-4]-mode$": > >> + allOf: > >> + - $ref: /schemas/types.yaml#/definitions/uint32 > >> + - enum: [0, 1, 2, 3, 4, 5, 6] > >> + description: | > >> + Integer describing static lane usage for the lane indicated in > >> + the property name. For Sierra there may be properties lane0 and > >> + lane1, for Torrent all lane[1-4]-mode properties may be > >> + there. The constants to indicate the lane usage are defined in > >> + "include/dt-bindings/phy/phy.h". The lane is assumed to be unused > >> + if its lane-use property does not exist. > > > > The defines were intended to be in 'phys' cells. Does putting both lane > > and mode in the client 'phys' properties not work? > > > > Let me first check if I understood you. So you are suggesting something > like this: > > dp-phy { > #phy-cells = <5>; /* 1 for phy-type and 4 for lanes = 5 */ > ... > }; > > dp-bridge { > ... > phys = <&dp-phy PHY_TYPE_DP 1 1 0 0>; /* lanes 0 and 1 for DP */ Yes, but I think the lanes can be a single cell mask. And I'd probably make that the first cell which is generally "which PHY" and make type/mode the 2nd cell. I'd look for other users of PHY_TYPE_ defines and match what they've done if possible. Rob