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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id p17sm44724028pfn.31.2019.12.28.18.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 18:45:49 -0800 (PST) Date: Sat, 28 Dec 2019 18:45:47 -0800 From: Bjorn Andersson To: Marc Gonzalez Cc: Stanimir Varbanov , Lorenzo Pieralisi , Andrew Murray , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM Message-ID: <20191229024547.GH3755841@builder> References: <20191227012717.78965-1-bjorn.andersson@linaro.org> <9e5ee7e8-aa63-e82c-8135-acc77b476c87@mm-sol.com> <38acf5fc-85aa-7090-e666-97a1281e9905@free.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <38acf5fc-85aa-7090-e666-97a1281e9905@free.fr> User-Agent: Mutt/1.12.2 (2019-09-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote: > On 27/12/2019 09:51, Stanimir Varbanov wrote: > > > On 12/27/19 3:27 AM, Bjorn Andersson wrote: > > > >> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit > >> the fixup to only affect the relevant PCIe bridges. > >> > >> Cc: stable@vger.kernel.org > >> Signed-off-by: Bjorn Andersson > >> --- > >> > >> Stan, I picked up all the suggested device id's from the previous thread and > >> added 0x1000 for QCS404. I looked at creating platform specific defines in > >> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would > >> prefer that I do this anyway. > > > > Looks good, > > > > Acked-by: Stanimir Varbanov > > > >> drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++- > >> 1 file changed, 7 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > >> index 5ea527a6bd9f..138e1a2d21cc 100644 > >> --- a/drivers/pci/controller/dwc/pcie-qcom.c > >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c > >> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev) > >> { > >> dev->class = PCI_CLASS_BRIDGE_PCI << 8; > >> } > >> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class); > >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class); > > Hrmmm... still not CCed on the patch, You are Cc'ed on the patch, but as usual your mail server responds "451 too many errors from your ip" and throw my emails away. > and still don't think the fixup is required(?) for 0x106 and 0x107. > I re-read your reply in my v1 thread. So we know that 0x104 doesn't need the fixup, so resumably only 0x101 needs the fixup? Regards, Bjorn