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Mon, 30 Dec 2019 09:13:06 +0000 From: Peng Fan To: "sboyd@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "festevam@gmail.com" , Abel Vesa , Leonard Crestez CC: "kernel@pengutronix.de" , dl-linux-imx , Aisheng Dong , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Anson Huang , Jacky Bai , Peng Fan Subject: [PATCH 3/3] clk: imx: imx8m: use imx_clk_hw_pll14xx_flags for dram pll Thread-Topic: [PATCH 3/3] clk: imx: imx8m: use imx_clk_hw_pll14xx_flags for dram pll Thread-Index: AQHVvvFbxKyPeAf2oEWw9V8pqxLyug== Date: Mon, 30 Dec 2019 09:13:10 +0000 Message-ID: <1577696903-27870-4-git-send-email-peng.fan@nxp.com> References: <1577696903-27870-1-git-send-email-peng.fan@nxp.com> In-Reply-To: <1577696903-27870-1-git-send-email-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR03CA0057.apcprd03.prod.outlook.com (2603:1096:202:17::27) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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x-microsoft-antispam-message-info: B/Aj+4H26luSTUJBNYrwQfvdkPAIE7fquu+FLEi9++KkPnwB/ki1q3nbOloRy00mNxdgujlYC79WWRUp+PKEWibflD+STroTw1dorur4hHMrRAc2fKK42/Ewk4fobfXKgbX/YRTaOw7C+Cz6ZMWP/beygU6O1EY/yhEWEGl2od1a56oYFYWuM8tN9UbLs9ZxUV9Vlhk0GsKrnMNn/YHuW1bSquCJbWIwMsCWbuWkOsVXXFgzp3Ll8zcMBGuTad7lWMNHmXcg2/MYQyg0INigZpQYy/3IkcOTC3+BOc1nKD0yE9PzsTYW4G6MjOp2I1F70F5dBhj3/nqK8RSt1V+RL5ca0tjex7TA5dDdoTFaguqCscvMjwvLcnq6dg4FWP24c1a1juZWkWtcjanmP6Bf2WJWTH3Nmla5hpHi4W0PQnXsXTCPR8k5i9FKQAL+rbBo9o5s1uM9xCohaxmAdj6u8KasRuCqmeJnw3NtgE+kLlRMimLg0ZwHHEAO5rhl/j6uLXucTeRypps5EENDTPiMQg== Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 42829551-2c58-46b1-3b16-08d78d087d85 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Dec 2019 09:13:10.4560 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SzNACm0XTZut76tukBFkfWnywltQrevlk8vez33vt7IeHWRAg90C5ALTuoRGic6S6hc8p+AW393xn2XKFcYQOQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6401 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan Use imx_clk_hw_pll14xx_flags for dram pll. Modify imx_1443x_dram_pll to imx_1443x_dram_readonly, because dram pll is not expected to be modified from Linux. Signed-off-by: Peng Fan --- drivers/clk/imx/clk-imx8mm.c | 2 +- drivers/clk/imx/clk-imx8mn.c | 2 +- drivers/clk/imx/clk-pll14xx.c | 3 +-- drivers/clk/imx/clk.h | 2 +- 4 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 2ed93fc25087..55862652b19f 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -337,7 +337,7 @@ static int imx8mm_clocks_probe(struct platform_device *= pdev) hws[IMX8MM_AUDIO_PLL1] =3D imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_r= ef_sel", base, &imx_1443x_pll); hws[IMX8MM_AUDIO_PLL2] =3D imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_r= ef_sel", base + 0x14, &imx_1443x_pll); hws[IMX8MM_VIDEO_PLL1] =3D imx_clk_hw_pll14xx("video_pll1", "video_pll1_r= ef_sel", base + 0x28, &imx_1443x_pll); - hws[IMX8MM_DRAM_PLL] =3D imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel= ", base + 0x50, &imx_1443x_dram_pll); + hws[IMX8MM_DRAM_PLL] =3D imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_r= ef_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE); hws[IMX8MM_GPU_PLL] =3D imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", = base + 0x64, &imx_1416x_pll); hws[IMX8MM_VPU_PLL] =3D imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", = base + 0x74, &imx_1416x_pll); hws[IMX8MM_ARM_PLL] =3D imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", = base + 0x84, &imx_1416x_pll); diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index c5e7316b4c66..e4710d3cf3e0 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -334,7 +334,7 @@ static int imx8mn_clocks_probe(struct platform_device *= pdev) hws[IMX8MN_AUDIO_PLL1] =3D imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_r= ef_sel", base, &imx_1443x_pll); hws[IMX8MN_AUDIO_PLL2] =3D imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_r= ef_sel", base + 0x14, &imx_1443x_pll); hws[IMX8MN_VIDEO_PLL1] =3D imx_clk_hw_pll14xx("video_pll1", "video_pll1_r= ef_sel", base + 0x28, &imx_1443x_pll); - hws[IMX8MN_DRAM_PLL] =3D imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel= ", base + 0x50, &imx_1443x_dram_pll); + hws[IMX8MN_DRAM_PLL] =3D imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_r= ef_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE); hws[IMX8MN_GPU_PLL] =3D imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", = base + 0x64, &imx_1416x_pll); hws[IMX8MN_VPU_PLL] =3D imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", = base + 0x74, &imx_1416x_pll); hws[IMX8MN_ARM_PLL] =3D imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", = base + 0x84, &imx_1416x_pll); diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 030159dc4884..33236d8580a6 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -67,9 +67,8 @@ struct imx_pll14xx_clk imx_1443x_pll =3D { .rate_count =3D ARRAY_SIZE(imx_pll1443x_tbl), }; =20 -struct imx_pll14xx_clk imx_1443x_dram_pll =3D { +struct imx_pll14xx_clk imx_1443x_pll_readonly =3D { .type =3D PLL_1443X, - .flags =3D CLK_GET_RATE_NOCACHE, }; =20 struct imx_pll14xx_clk imx_1416x_pll =3D { diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 35a9d294b6df..ea84d2993b57 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -53,7 +53,7 @@ struct imx_pll14xx_clk { =20 extern struct imx_pll14xx_clk imx_1416x_pll; extern struct imx_pll14xx_clk imx_1443x_pll; -extern struct imx_pll14xx_clk imx_1443x_dram_pll; +extern struct imx_pll14xx_clk imx_1443x_pll_readonly; =20 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)) --=20 2.16.4