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[209.132.180.67]) by mx.google.com with ESMTP id p7si27723140ota.299.2020.01.01.23.43.42; Wed, 01 Jan 2020 23:43:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=siol.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727680AbgABHm5 (ORCPT + 99 others); Thu, 2 Jan 2020 02:42:57 -0500 Received: from mailoutvs63.siol.net ([185.57.226.254]:36069 "EHLO mail.siol.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726145AbgABHm4 (ORCPT ); Thu, 2 Jan 2020 02:42:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTP id 8082052133B; Thu, 2 Jan 2020 08:42:52 +0100 (CET) X-Virus-Scanned: amavisd-new at psrvmta10.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta10.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id ad5ClAWr3I4e; Thu, 2 Jan 2020 08:42:52 +0100 (CET) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTPS id 09C39521341; Thu, 2 Jan 2020 08:42:52 +0100 (CET) Received: from jernej-laptop.localnet (89-212-178-211.dynamic.t-2.net [89.212.178.211]) (Authenticated sender: jernej.skrabec@siol.net) by mail.siol.net (Postfix) with ESMTPA id A612F52133B; Thu, 2 Jan 2020 08:42:51 +0100 (CET) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: mripard@kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, roman.stratiienko@globallogic.com Cc: Roman Stratiienko Subject: Re: [PATCH v3 2/2] drm/sun4i: Use CRTC size instead of PRIMARY plane size as mixer frame. Date: Thu, 02 Jan 2020 08:42:51 +0100 Message-ID: <2989265.aV6nBDHxoP@jernej-laptop> In-Reply-To: <20200101204750.50541-2-roman.stratiienko@globallogic.com> References: <20200101204750.50541-1-roman.stratiienko@globallogic.com> <20200101204750.50541-2-roman.stratiienko@globallogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi! Dne sreda, 01. januar 2020 ob 21:47:50 CET je roman.stratiienko@globallogic.com napisal(a): > From: Roman Stratiienko > > According to DRM documentation the only difference between PRIMARY > and OVERLAY plane is that each CRTC must have PRIMARY plane and > OVERLAY are optional. > > Allow PRIMARY plane to have dimension different from full-screen. > > Fixes: 5bb5f5dafa1a ("drm/sun4i: Reorganize UI layer code in DE2") > Signed-off-by: Roman Stratiienko This looks great now. Reviewed-by: Jernej Skrabec What happened to other patches in the series? It would be nice to have a cover letter for such cases, where you can explain reasons for dropped patches. Best regards, Jernej > --- > v2: > - Split commit in 2 parts > - Add Fixes line to the commit message > > v3: > - Address review comments of v2 + removed 3 local varibles > - Change 'Fixes' line > > Since I've put more changes from my side, please review/sign again. > --- > drivers/gpu/drm/sun4i/sun8i_mixer.c | 28 ++++++++++++++++++++++++ > drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 30 -------------------------- > 2 files changed, 28 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 8b803eb903b8..658cf442c121 > 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c > @@ -257,6 +257,33 @@ const struct de2_fmt_info *sun8i_mixer_format_info(u32 > format) return NULL; > } > > +static void sun8i_mode_set(struct sunxi_engine *engine, > + struct drm_display_mode *mode) > +{ > + u32 size = SUN8I_MIXER_SIZE(mode->crtc_hdisplay, mode- >crtc_vdisplay); > + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); > + u32 bld_base = sun8i_blender_base(mixer); > + u32 val; > + > + DRM_DEBUG_DRIVER("Mode change, updating global size W: %u H: %u\n", > + mode->crtc_hdisplay, mode->crtc_vdisplay); > + regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_SIZE, size); > + regmap_write(mixer->engine.regs, > + SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); > + > + if (mode->flags & DRM_MODE_FLAG_INTERLACE) > + val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; > + else > + val = 0; > + > + regmap_update_bits(mixer->engine.regs, > + SUN8I_MIXER_BLEND_OUTCTL(bld_base), > + SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, > + val); > + DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", > + val ? "on" : "off"); > +} > + > static void sun8i_mixer_commit(struct sunxi_engine *engine) > { > DRM_DEBUG_DRIVER("Committing changes\n"); > @@ -310,6 +337,7 @@ static struct drm_plane **sun8i_layers_init(struct > drm_device *drm, static const struct sunxi_engine_ops sun8i_engine_ops = { > .commit = sun8i_mixer_commit, > .layers_init = sun8i_layers_init, > + .mode_set = sun8i_mode_set, > }; > > static struct regmap_config sun8i_mixer_regmap_config = { > diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c > b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 4343ea9f8cf8..f01ac55191f1 > 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c > +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c > @@ -120,36 +120,6 @@ static int sun8i_ui_layer_update_coord(struct > sun8i_mixer *mixer, int channel, insize = SUN8I_MIXER_SIZE(src_w, src_h); > outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); > > - if (plane->type == DRM_PLANE_TYPE_PRIMARY) { > - bool interlaced = false; > - u32 val; > - > - DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", > - dst_w, dst_h); > - regmap_write(mixer->engine.regs, > - SUN8I_MIXER_GLOBAL_SIZE, > - outsize); > - regmap_write(mixer->engine.regs, > - SUN8I_MIXER_BLEND_OUTSIZE(bld_base), outsize); > - > - if (state->crtc) > - interlaced = state->crtc->state- >adjusted_mode.flags > - & DRM_MODE_FLAG_INTERLACE; > - > - if (interlaced) > - val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; > - else > - val = 0; > - > - regmap_update_bits(mixer->engine.regs, > - SUN8I_MIXER_BLEND_OUTCTL(bld_base), > - SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, > - val); > - > - DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", > - interlaced ? "on" : "off"); > - } > - > /* Set height and width */ > DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", > state->src.x1 >> 16, state->src.y1 >> 16);