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[209.132.180.67]) by mx.google.com with ESMTP id 17si12076047oix.22.2020.01.02.09.41.10; Thu, 02 Jan 2020 09:41:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=Z+Tkx29q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727829AbgABRkY (ORCPT + 99 others); Thu, 2 Jan 2020 12:40:24 -0500 Received: from mail-qt1-f194.google.com ([209.85.160.194]:32931 "EHLO mail-qt1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727755AbgABRkY (ORCPT ); Thu, 2 Jan 2020 12:40:24 -0500 Received: by mail-qt1-f194.google.com with SMTP id d5so35191897qto.0 for ; Thu, 02 Jan 2020 09:40:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=+sRNYThXV/qw+oqY2hzFYFQkSAluAiDf3LujstPJXpk=; b=Z+Tkx29qHd99z3LbNVNdDV3VtbSq4poPWwpGVSq/8bOwWWJru2Np+4/MO3Eqi0M+/n XwsWUu4GiugfaKjmGWy5dcgYknIPmgQ8HSg+BQMFx1AKnQQ98ufVB32z11XFH3JmK67+ VmTtMu9erNzklKo5sGUNJ2CSRTaec8GjM3gpJuyyYkyESfBBsjtB4iQyHIduJuCnZoDF GHKxnjVyXJ8x6LKaFD3ZIn6h9YR0Sj58IUPVoAknxXgWCNKVAnJaoyCwWYMevzDAPSmo 8XhVUG04wcBsyryZCGDlnYuzweHgr82zQq9b9VbPxYxJOcsCjIX4PfJUpX6QNTqdSz95 1+Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=+sRNYThXV/qw+oqY2hzFYFQkSAluAiDf3LujstPJXpk=; b=jjISOPhNFvqiRdi2KTg0ZpbEqdyzkaurd9fqhwmk1q3QotrJb89kCsxSFhec28Kw6y JPgpQ3hvfm8gtOHoYDAm2EDnVG/BC/l4/XANSBQhQybDL2J/z0NHIkPWA8RDRkgO7d5V 4hrdH+khjFoChXzEL/TYT/KLJ7rpC7vl+FncVlsiEZm/VtccP/4KQ2y88g7OofKZohrp 0e0UDgOL+xhprLStX0QT3YFvWT7b8FWTArMrvJEBPYmZ1GiytK/teFIn3shxUjdanwWr MbGT8Hqa6wXIimhFrlbUVvQCI6oB7edUrdpB8mKGBmktctCDSTMalndNdEj3nlrSAT/1 sjzA== X-Gm-Message-State: APjAAAUj5v8fqf3KZLXG23tL9D3YemI8Uh5MZknwrGH3WaLQIHWN2gJQ naa4pb1Z7uk8tJjL4JDGcxCNIHNk7h/3kak3ph16yI0L X-Received: by 2002:ac8:704:: with SMTP id g4mr60782643qth.197.1577986823008; Thu, 02 Jan 2020 09:40:23 -0800 (PST) MIME-Version: 1.0 References: <1577362338-28744-1-git-send-email-srinivas.neeli@xilinx.com> <1577362338-28744-3-git-send-email-srinivas.neeli@xilinx.com> In-Reply-To: <1577362338-28744-3-git-send-email-srinivas.neeli@xilinx.com> From: Bartosz Golaszewski Date: Thu, 2 Jan 2020 18:40:12 +0100 Message-ID: Subject: Re: [PATCH 2/8] gpio: zynq: protect direction in/out with a spinlock To: Srinivas Neeli Cc: Linus Walleij , Michal Simek , shubhrajyoti.datta@xilinx.com, linux-gpio , arm-soc , LKML , git@xilinx.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org czw., 26 gru 2019 o 13:12 Srinivas Neeli napisa= =C5=82(a): > > From: Glenn Langedock > > Fix race condition when changing the direction (in/out) of the GPIO pin. > The read-modify-write sequence (as coded in the driver) isn't atomic and > requires synchronization (spinlock). > > Signed-off-by: Glenn Langedock > Signed-off-by: Michal Simek > Signed-off-by: Srinivas Neeli > --- > drivers/gpio/gpio-zynq.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c > index 05ba16fffdad..9c8b8a397a26 100644 > --- a/drivers/gpio/gpio-zynq.c > +++ b/drivers/gpio/gpio-zynq.c > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -116,6 +117,7 @@ struct gpio_regs { > * @irq: interrupt for the GPIO device > * @p_data: pointer to platform data > * @context: context registers > + * @dirlock: lock used for direction in/out synchronization > */ > struct zynq_gpio { > struct gpio_chip chip; > @@ -124,6 +126,7 @@ struct zynq_gpio { > int irq; > const struct zynq_platform_data *p_data; > struct gpio_regs context; > + spinlock_t dirlock; /*lock used for direction in/out synchronizat= ion */ Maybe just call it 'lock' in case it turns out other operations need locking as well? Bart