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[209.132.180.67]) by mx.google.com with ESMTP id b18si22574086oib.170.2020.01.06.06.35.58; Mon, 06 Jan 2020 06:36:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726467AbgAFOfS (ORCPT + 99 others); Mon, 6 Jan 2020 09:35:18 -0500 Received: from sauhun.de ([88.99.104.3]:39296 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726303AbgAFOfS (ORCPT ); Mon, 6 Jan 2020 09:35:18 -0500 Received: from localhost (p54B338AC.dip0.t-ipconnect.de [84.179.56.172]) by pokefinder.org (Postfix) with ESMTPSA id C0F512C0686; Mon, 6 Jan 2020 15:35:15 +0100 (CET) Date: Mon, 6 Jan 2020 15:35:15 +0100 From: Wolfram Sang To: Eugen.Hristev@microchip.com Cc: robh@kernel.org, Ludovic.Desroches@microchip.com, peda@axentia.se, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Codrin.Ciubotariu@microchip.com Subject: Re: [PATCH v3 2/4] i2c: at91: fix clk_offset for sam9x60 Message-ID: <20200106143515.GD1290@ninjato> References: <1575886763-19089-1-git-send-email-eugen.hristev@microchip.com> <1575886763-19089-2-git-send-email-eugen.hristev@microchip.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="BZaMRJmqxGScZ8Mx" Content-Disposition: inline In-Reply-To: <1575886763-19089-2-git-send-email-eugen.hristev@microchip.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --BZaMRJmqxGScZ8Mx Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Dec 09, 2019 at 10:20:02AM +0000, Eugen.Hristev@microchip.com wrote: > From: Eugen Hristev >=20 > In SAM9X60 datasheet, FLEX_TWI_CWGR register description mentions clock > offset of 3 cycles (compared to 4 in eg. SAMA5D3). > This is the same offset as in SAMA5D2. >=20 > Fixes: b00277923743 ("i2c: at91: add new platform support for sam9x60") > Suggested-by: Codrin Ciubotariu > Signed-off-by: Eugen Hristev > Acked-by: Ludovic Desroches > Reviewed-by: Codrin Ciubotariu Applied to for-current, thanks! --BZaMRJmqxGScZ8Mx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAl4TRZ8ACgkQFA3kzBSg KbZD2g//eV3AhB8wlN/36GjEs1MJvsA2qKyPEJ3/JSCxkTKVzSmCKlaSI+1m+Tru gN/sS4PgGkX3U6K77jkaSNALzKysK0cxjwcRThveO5sm6DxSsF3uckT7ZNoFDqlG +etqwW0B82L8vwL4GoylkTt5VkeRm0QVwR+agvBiMYcU4FskcpUWf/jHtJrPd3eq YasS3WIr0IDNxl62S3MNDUCYo9MnF/6HX8fS9oSnO0FwkeUiB+MthODPDTxt3GtZ J+Mpmg4bvgJqcuMflVLfB28R0pijHnaIC6rUH2kHftCx7sq5qZmsU6LApkrFl2kL b8YTlEvRlfDSB+f288W1eDsSAJmIQm2/EIDfPthoVUyHGkYos6yFDh9wwMgjS9Xp 6iiDAHiek4Rr8JKjVIo92lnFgs7X6Xmcjcw2IO0TsqltjgTsKimyDxscz+Bhn4MZ Yv3uL6KxisenKoergopCx9U4LWIBFJEvcSJT+jBYf6p7/kwdRuQfGf1RsJU42d22 7mrp6Pc/zvJQ9xRGT8DtBWhdKFTc6rQ9rojMtBwsvbtUDzxgKCYJM0q68n0V8ito p9HmfCvqoSU1KdLnaQdYPsmrIJ4siL8GR6ReXqffqspyRnnd4+/gTVt9235IbUpp EUFcYCaguYrtSyWE8Y0Vc8DMmm38gDA6LyvGwIlsP2o864xlPjA= =iI+X -----END PGP SIGNATURE----- --BZaMRJmqxGScZ8Mx--