Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp21847805ybl; Mon, 6 Jan 2020 12:31:19 -0800 (PST) X-Google-Smtp-Source: APXvYqyatFP3yJ5ZYZW+sRdGvWvmgf+DnzHXKPccOZ0pnAh1nEcbxgkh7BV7avEY5OVby6HlMhuC X-Received: by 2002:a05:6808:81:: with SMTP id s1mr6482780oic.179.1578342679704; Mon, 06 Jan 2020 12:31:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1578342679; cv=none; d=google.com; s=arc-20160816; b=F8cvqbTMnCrs/Ff7hQpLPpOHK4+Ttt2fLBfpExrSzDTUHXb5HTliZ5yibql5dzNVo4 +uty+NP9WGAP0qnEWWU0i+Q2KBkSIyutqHLa51c341pdNN/DJo2nn0DKDnf+cRkf59xu SEqYu5w68uHFqFg1QWKb/HZzZSN/X/KxnuZsqE1EJRAH9RHP+1vBIViHSt351c4nX6/r 3xQEz/jRR4Vpo6717ipSIjiVMMjkN6qS+t+clA1SsHxw3OJqc2qjeOHUDb+vKg+objew 3e0bZ0psviCSzZeOMCvk5eBr2C7WmF7UULTeSkBTveeD48zpokWRbmhlCgOOknpRvJnK eAmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=xLRya+UjA0tJbkPNjZrDsyJ92WDo19Nps0Lou4XZuuI=; b=pChP8QHlyc7cjbm7dhQOl3pkVqNY8SmEP6tbe8gBFA5m8nogSqLaGHvLmSCxTZ0vm1 ph14eW0ViNrUqbc1u4QWEB8xhCvL9/oi1Rcp1fws9COI64tyeC9fiSbwy1Bg2ObkRCF9 mG1/1AiuCMplBGSzNudu7sJmMdFSDn3FQnfc/Z1KrcMjC7/PTb7Ls+de3wfRwjwLXio1 ydH1nWtu37k34rA7T8eMvgTT8vDRPISyIrFwP0a9P1lfm4MzOorBNyiD/oFJNn/xYHbr 9shf9NsWZDy6dWJIQ+d1/1KrH1O6aeX41qO2CFhI1rB7NdJUfelHMLHRqB2tJ90HlCNf 0c4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b10si33902810oic.153.2020.01.06.12.31.07; Mon, 06 Jan 2020 12:31:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727024AbgAFUaW (ORCPT + 99 others); Mon, 6 Jan 2020 15:30:22 -0500 Received: from mga03.intel.com ([134.134.136.65]:10708 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726931AbgAFUaT (ORCPT ); Mon, 6 Jan 2020 15:30:19 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jan 2020 12:30:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,403,1571727600"; d="scan'208";a="245699421" Received: from labuser-ice-lake-client-platform.jf.intel.com ([10.54.55.50]) by fmsmga004.fm.intel.com with ESMTP; 06 Jan 2020 12:30:18 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, acme@redhat.com, mingo@kernel.org, linux-kernel@vger.kernel.org Cc: tglx@linutronix.de, jolsa@kernel.org, eranian@google.com, alexander.shishkin@linux.intel.com, ak@linux.intel.com, Kan Liang Subject: [PATCH V5 RESEND 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS Date: Mon, 6 Jan 2020 12:29:07 -0800 Message-Id: <20200106202919.2943-3-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200106202919.2943-1-kan.liang@linux.intel.com> References: <20200106202919.2943-1-kan.liang@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang TOPDOWN.SLOTS(0x0400) is not a generic event. It is only available on fixed counter3. Don't extend its mask to generic counters. Signed-off-by: Kan Liang --- No changes since V4 arch/x86/events/intel/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index dc64b16e6b71..b61e81316c2b 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -5118,12 +5118,14 @@ __init int intel_pmu_init(void) if (x86_pmu.event_constraints) { /* - * event on fixed counter2 (REF_CYCLES) only works on this + * event on fixed counter2 (REF_CYCLES) and + * fixed counter3 (TOPDOWN.SLOTS) only work on this * counter, so do not extend mask to generic counters */ for_each_event_constraint(c, x86_pmu.event_constraints) { if (c->cmask == FIXED_EVENT_FLAGS - && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) { + && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES + && c->idxmsk64 != INTEL_PMC_MSK_FIXED_SLOTS) { c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1; } c->idxmsk64 &= -- 2.17.1