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[99.152.116.91]) by smtp.gmail.com with ESMTPSA id u26sm76165686pfn.46.2020.01.06.15.20.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jan 2020 15:20:32 -0800 (PST) From: Olof Johansson To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Olof Johansson Subject: [PATCH v2] riscv: keep 32-bit kernel to 32-bit phys_addr_t Date: Mon, 6 Jan 2020 15:20:24 -0800 Message-Id: <20200106232024.97137-1-olof@lixom.net> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200106231611.10169-1-olof@lixom.net> References: <20200106231611.10169-1-olof@lixom.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While rv32 technically has 34-bit physical addresses, no current platforms use it and it's likely to shake out driver bugs. Let's keep 64-bit phys_addr_t off on 32-bit builds until one shows up, since other work will be needed to make such a system useful anyway. PHYS_ADDR_T_64BIT is def_bool 64BIT, so just remove the select. Signed-off-by: Olof Johansson --- v2: Just remove the select, since it's set by default if CONFIG_64BIT arch/riscv/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a31169b02ec06..569fc6deb94d6 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,8 +12,6 @@ config 32BIT config RISCV def_bool y - # even on 32-bit, physical (and DMA) addresses are > 32-bits - select PHYS_ADDR_T_64BIT select OF select OF_EARLY_FLATTREE select OF_IRQ -- 2.20.1