Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp22177143ybl;
        Mon, 6 Jan 2020 20:16:53 -0800 (PST)
X-Google-Smtp-Source: APXvYqyapxmizYRdTvYPrtAKk6MGXMzTJ2YtaPqA4aJl/s/gPuhrSWn9NuLd8HLdYO40V4CC/kYS
X-Received: by 2002:a9d:8f1:: with SMTP id 104mr112110709otf.107.1578370613592;
        Mon, 06 Jan 2020 20:16:53 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1578370613; cv=none;
        d=google.com; s=arc-20160816;
        b=k8Mv4htwjOy/J4sKH9wMjAJqVAkRw7wP8qHj8ZX172Qvwri3U1qekBU0KGX4rQ4iYR
         OPJvBI7VwYUr/vfOjwUD+HKZMMH7E1OIYZ2S0rZuKYXgQJ8n/guLm5lGUe1F1/0bdAXA
         VKubk2KN1FPFBNMNQAWlnb975DYTdZ/PF9gXnF3RvU9hD9ErSLAo+uw5L1zdZy5mLbiW
         iXwqzwxnQ2o4nszzThcNPzQ/O5NZHVdPyMprG5oZfIcYmLTWDADIJW0ClLpPMAmchLm0
         1xGusTNkcwr6e8sLBD1Cn4O9A2l+8VIEtqimtLBh/3sFj2qWUtM/Q+/TOEFvC4a6U/YL
         C9+w==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=jX1cHxQTxMoGEsw+O/JuXtnczaKSZYeLGNN+1j++LWw=;
        b=1H4rpgLKEZRxjEffyx5TWgyU2nwUOTPDnzCKANiG69UpkWUDjxUlcPXaapB/6xQhzP
         /Gu87IB5KW1HiLqTH1/LPTG9bgzz/12G9UGx7M1B8pnorRZU0TPGDO3CikEFw2ZscG4V
         adno4oj+jGLQsD9hVZFIfm8WCp5ETiks7MTfxh9r11WW89GRLKUCEeWEU/5cU1SxZ9ey
         oHQzx5k4/mGjTUDIi/nhog7yzj8mrMPsqlOVoTX1wBLOmo5Wkq9dSEGV8ACkkqBCLmYs
         Y1tYMqL9TWk25n4+yZZrLRyT8UhOd6whgWrTw+14kVrKU1L4wnbEjVCqGFILz/UwyWeJ
         B2lQ==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=IxrTI2Zg;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id p83si33360607oih.198.2020.01.06.20.16.41;
        Mon, 06 Jan 2020 20:16:53 -0800 (PST)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=IxrTI2Zg;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1727587AbgAGEO3 (ORCPT <rfc822;bowenwang.tinker@gmail.com>
        + 99 others); Mon, 6 Jan 2020 23:14:29 -0500
Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:11374 "EHLO
        hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1727549AbgAGEO0 (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 6 Jan 2020 23:14:26 -0500
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5e1405720000>; Mon, 06 Jan 2020 20:13:38 -0800
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Mon, 06 Jan 2020 20:14:25 -0800
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Mon, 06 Jan 2020 20:14:25 -0800
Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 7 Jan
 2020 04:14:25 +0000
Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL111.nvidia.com
 (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Tue, 7 Jan 2020 04:14:25 +0000
Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.171.88]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5e1405a00000>; Mon, 06 Jan 2020 20:14:25 -0800
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <broonie@kernel.org>,
        <lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>,
        <digetx@gmail.com>, <mperttunen@nvidia.com>,
        <gregkh@linuxfoundation.org>, <sboyd@kernel.org>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>
CC:     <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
        <spujar@nvidia.com>, <josephl@nvidia.com>,
        <daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>,
        <markz@nvidia.com>, <devicetree@vger.kernel.org>,
        <linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
Subject: [PATCH v6 03/19] clk: tegra: Fix Tegra PMC clock out parents
Date:   Mon, 6 Jan 2020 20:14:02 -0800
Message-ID: <1578370458-3686-4-git-send-email-skomatineni@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1578370458-3686-1-git-send-email-skomatineni@nvidia.com>
References: <1578370458-3686-1-git-send-email-skomatineni@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1578370418; bh=jX1cHxQTxMoGEsw+O/JuXtnczaKSZYeLGNN+1j++LWw=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=IxrTI2ZgmAif+DCFVvGGhjsyeQsvXBiHsYtNLKCcY+yBtbBxV8y99poGiWiqIOEAu
         bONq3Y9FKhsyqGFktcJEJICee1bcoao4sKnaDRWt/IiJ7lzu3/W9fOXwnxf1FSGW1/
         K4A+TyOfEfZJ20v5LbVoS+0hT5EW26b/FDO6gnDPg0aG33ArGSf5pTRtAUOMcvxbAo
         fhDCBlo2f/+NnLhuuS4HwEnZ2nW1LwOeJXFFefViiccmBRzEYKCTToPXL5b+iBjwfk
         NimlNUsl+a126ECk9A7ip6fCJv9GwsBscAGxCAkbMcq7iNnnikpVGcArad42fyr2Pz
         moMt9x646NAWQ==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Tegra PMC clock out parents are osc, osc_div2, osc_div4 and extern
clock.

Clock driver is using incorrect parents clk_m, clk_m_div2, clk_m_div4
for PMC clocks.

This patch fixes this.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/clk/tegra/clk-tegra-pmc.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c
index bec3e008335f..5e044ba1ae36 100644
--- a/drivers/clk/tegra/clk-tegra-pmc.c
+++ b/drivers/clk/tegra/clk-tegra-pmc.c
@@ -49,16 +49,16 @@ struct pmc_clk_init_data {
 
 static DEFINE_SPINLOCK(clk_out_lock);
 
-static const char *clk_out1_parents[] = { "clk_m", "clk_m_div2",
-	"clk_m_div4", "extern1",
+static const char *clk_out1_parents[] = { "osc", "osc_div2",
+	"osc_div4", "extern1",
 };
 
-static const char *clk_out2_parents[] = { "clk_m", "clk_m_div2",
-	"clk_m_div4", "extern2",
+static const char *clk_out2_parents[] = { "osc", "osc_div2",
+	"osc_div4", "extern2",
 };
 
-static const char *clk_out3_parents[] = { "clk_m", "clk_m_div2",
-	"clk_m_div4", "extern3",
+static const char *clk_out3_parents[] = { "osc", "osc_div2",
+	"osc_div4", "extern3",
 };
 
 static struct pmc_clk_init_data pmc_clks[] = {
-- 
2.7.4