Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp51623ybl; Tue, 7 Jan 2020 01:59:33 -0800 (PST) X-Google-Smtp-Source: APXvYqxy3oMjGS6ARO805Vrg9YyIdbrv3iZDOul4KtdYxZ2sUwKwZ1bR0VcZb6TlHlaSue88RH2R X-Received: by 2002:a05:6830:1149:: with SMTP id x9mr123197441otq.156.1578391173633; Tue, 07 Jan 2020 01:59:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1578391173; cv=none; d=google.com; s=arc-20160816; b=tnE/RJrN2xDlTTLze0TZOcWySX+ZvQ24TU84LONXe/fjkZLQqgZCxB3yK64ATpB0N8 SwHgi0VXTQ+QaloPViCgyNztkRRJ7IZjKJWaSRTBInE5KgCRT6cGSdD/eGkQCZX6s6hM MuM7WILPAydrQav2EZ4nSB5HfL3jbHP2Q7MljVKR0/uv2OBTXaO9+Nn6mXCotMXK1+A4 vSAu4ixhE+GDZSOMK5ZNDueO6GRKAH0/ua+jbyFYSDOauyphaC7XYlyjhvu6kbjCJ+RS HL4vC/gAEl8EPOM1aQL5aBVcFmdUEPDfwLTpfKJsj9W5q+m5EiVTdTNksDYh/ZNZ3UQ4 1Y8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:in-reply-to :subject:cc:to:from:user-agent:references:dkim-signature; bh=UfGDE/pY8GyHptw1+lgKhCDTDIHwOAgtK6t8XN0nv5M=; b=VDgEgNCwCYZ2dwtmoxOzEiFS+IgjnZKexVhXvUCh4AvWr72i8MmXZjLLhDNOJU72MU bSdDKX/hjK0LyxLB2Xr+YG7cO1hGemwohuz34slM8aT35Yqr50SzVYY6BwGJszaXscHb ZEAAalGBkKF1xor1BmGvq3Cc2eRwqZrnPLpJh0fjK8QpQ15ADFQxOMd/HmFJWU5jFHWh HHcfaay3NEBoRJYnxpTeq42H9daKWiHu2cbO6uJBlrjb7ahaYJgKmbk8c1NAZ9AKKYeG gFTaVXWjcC5fdixU1fc7aWlMsURwdFGsxPo/9FuJa4xb4HpxY+DSMsxH27/wfdvlh4Tl kltA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=ziDuMHvp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w4si37038048otl.214.2020.01.07.01.59.21; Tue, 07 Jan 2020 01:59:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=ziDuMHvp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727774AbgAGJ6R (ORCPT + 99 others); Tue, 7 Jan 2020 04:58:17 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:39432 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727084AbgAGJ6Q (ORCPT ); Tue, 7 Jan 2020 04:58:16 -0500 Received: by mail-wm1-f68.google.com with SMTP id 20so18611225wmj.4 for ; Tue, 07 Jan 2020 01:58:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=references:user-agent:from:to:cc:subject:in-reply-to:date :message-id:mime-version; bh=UfGDE/pY8GyHptw1+lgKhCDTDIHwOAgtK6t8XN0nv5M=; b=ziDuMHvptB5Iu+MWIvv7l5G8tPvQ62nt+243YesP3kh3NQllbFzC0wCoWuOPEliMoN fO8w5gcZPdaccC5JuLJLdvgPrLjqL5NMPXXhH9H+If4iQQR4TwPn94FfkkM9ixj98/tI eiNUZ0h09fFAS6fsjhBMM3VPL9oFlrySbPVIbbo2bkKhmdEQ2ib1aWRSNM1l/Ka5D/3u HaDAB7iNzcL0++VaSvgApD5ZwEvqceQQ2onwnpRQNghmfll5WqYbhG7v5iayIrHzmDw6 qcliaLUXAbEkkV2d8LJ2M1/jzQm7CUgjmZoNEZjokSJ5AynhB/n2OY/cV0XY5GwUTyqw Wmbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:references:user-agent:from:to:cc:subject :in-reply-to:date:message-id:mime-version; bh=UfGDE/pY8GyHptw1+lgKhCDTDIHwOAgtK6t8XN0nv5M=; b=AAC7WblFrUPubMffbcF+MDhDD12ypVJSzNAazDwSCdoKMgpt543/DPEnMd9fUnbMtA q8PjxFf8eP61zP+39Rex/bIogdXQCrxUgAC2Npa04qFOsXoUtYdZ4xIeQu+J070IEpxY lGfyDbG6epVdnD85qLsDTexq79XjH0sOhPGgApx2KETCBcXLGWd2zfIg4/UNPCSC/+fb ZDOaWeEpIFhLbdUI5rNGQ/dpdxouPmevztK6r6tZy6V3pX7rB62L5NjWo9+ekMeFr4WO R0x6BBgH3Ugy0KqRTLnw5mGZNqSJw189gC7d0l8jkcCQGHXLyhtndM3858fUm8VEWY1W QDVA== X-Gm-Message-State: APjAAAUsyqj6hcKmdxwXhCI444dYkCS3zI0INRmYaUbFYHjCQpgFQBKA WlQNhW24qFv9uVrsscOnfET/AQ== X-Received: by 2002:a1c:61c1:: with SMTP id v184mr38685861wmb.160.1578391093938; Tue, 07 Jan 2020 01:58:13 -0800 (PST) Received: from localhost (laubervilliers-658-1-213-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id h8sm78708203wrx.63.2020.01.07.01.58.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 01:58:13 -0800 (PST) References: <20191220091611.36319-1-jian.hu@amlogic.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Jian Hu , Neil Armstrong Cc: Kevin Hilman , "Rob Herring" , Martin Blumenstingl , Michael Turquette , Wolfram Sang , Mark Rutland , Jianxin Pan , linux-amlogic@lists.infradead.org, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3] arm64: dts: meson-a1: add I2C nodes In-reply-to: <20191220091611.36319-1-jian.hu@amlogic.com> Date: Tue, 07 Jan 2020 10:58:12 +0100 Message-ID: <1ja76zsi4r.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri 20 Dec 2019 at 10:16, Jian Hu wrote: > There are four I2C controllers in A1 series, > Share the same comptible with AXG. Compared to AXG, > Drive strength feature is newly added in A1. > > Signed-off-by: Jian Hu > > --- > This patch depends on A1 clock patchset at [0][3] > > Changes since v1 at [1]: > -change reg length to 0x20 > -assign i2c bus alias in dts file > -add new feature note compared to AXG in changelog > > Changes since v2 at [2]: > -remove the dependence the commit description > -remove i2c alias in dtsi > -reorder the i2c nodes > -reorder the i2c pins > > [0] https://lkml.kernel.org/r/20191206074052.15557-1-jian.hu@amlogic.com > [1] https://lkml.kernel.org/r/20191202111253.94872-1-jian.hu@amlogic.com > [2] https://lkml.kernel.org/r/20191211032802.83309-1-jian.hu@amlogic.com > [3] https://lkml.kernel.org/r/20191206074052.15557-1-jian.hu@amlogic.com > --- > --- > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 142 ++++++++++++++++++++++ > 1 file changed, 142 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > index eab2ecd36aa8..1542eeee699d 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi > @@ -117,6 +117,16 @@ > }; > }; > > + i2c0: i2c@1400 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x1400 0x0 0x20>; > + interrupts = ; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_A>; > + status = "disabled"; > + }; > + > uart_AO: serial@1c00 { > compatible = "amlogic,meson-gx-uart", > "amlogic,meson-ao-uart"; > @@ -136,6 +146,36 @@ > clock-names = "xtal", "pclk", "baud"; > status = "disabled"; > }; > + > + i2c1: i2c@5c00 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x5c00 0x0 0x20>; > + interrupts = ; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_B>; > + status = "disabled"; > + }; > + > + i2c2: i2c@6800 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x6800 0x0 0x20>; > + interrupts = ; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_C>; > + status = "disabled"; > + }; > + > + i2c3: i2c@6c00 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x6c00 0x0 0x20>; > + interrupts = ; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_I2C_M_D>; > + status = "disabled"; > + }; > }; > > gic: interrupt-controller@ff901000 { > @@ -171,3 +211,105 @@ > #clock-cells = <0>; > }; > }; > + > +&periphs_pinctrl { Why is this not directly under the periphs_pinctrl node ? > + i2c0_f9_pins:i2c0-f9 { ^ Missing space here. Same for the other nodes > + mux { > + groups = "i2c0_sck_f9", > + "i2c0_sda_f10"; > + function = "i2c0"; > + bias-pull-up; Most device we have seen so far have the pull-up on the PCB. If you look at the other dts file, the i2c pad bias is disabled. If the pull-up resistor is missing on the PCB, this setting can overloaded in the board dt. Bottom line please put "bias-disable" or justify why a1 is different from the SoC. > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c0_f11_pins:i2c0-f11 { > + mux { > + groups = "i2c0_sck_f11", > + "i2c0_sda_f12"; > + function = "i2c0"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_a_pins:i2c1-a { > + mux { > + groups = "i2c1_sck_a", > + "i2c1_sda_a"; > + function = "i2c1"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_x_pins:i2c1-x { > + mux { > + groups = "i2c1_sck_x", > + "i2c1_sda_x"; > + function = "i2c1"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_a4_pins:i2c2-a4 { > + mux { > + groups = "i2c2_sck_a4", > + "i2c2_sda_a5"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_a8_pins:i2c2-a8 { > + mux { > + groups = "i2c2_sck_a8", > + "i2c2_sda_a9"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_x0_pins:i2c2-x0 { > + mux { > + groups = "i2c2_sck_x0", > + "i2c2_sda_x1"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_x15_pins:i2c2-x15 { > + mux { > + groups = "i2c2_sck_x15", > + "i2c2_sda_x16"; > + function = "i2c2"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_f_pins:i2c3-f { > + mux { > + groups = "i2c3_sck_f", > + "i2c3_sda_f"; > + function = "i2c3"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_x_pins:i2c3-x { > + mux { > + groups = "i2c3_sck_x", > + "i2c3_sda_x"; > + function = "i2c3"; > + bias-pull-up; > + drive-strength-microamp = <3000>; > + }; > + }; > +};