Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
In-Reply-To: <20200107120317.GB8083@onstation.org>
References: <20191205002503.13088-1-masneyb@onstation.org> <20191205002503.13088-5-masneyb@onstation.org> <20200105083534.01EB12071A@mail.kernel.org> <20200107120317.GB8083@onstation.org>
Cc:     dmitry.torokhov@gmail.com, robh+dt@kernel.org,
        mark.rutland@arm.com, agross@kernel.org,
        bjorn.andersson@linaro.org, mturquette@baylibre.com,
        linux-input@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        linux-clk@vger.kernel.org
To:     Brian Masney <masneyb@onstation.org>
Subject: Re: [PATCH 4/7] dt-bindings: Input: introduce new clock vibrator bindings
From:   Stephen Boyd <sboyd@kernel.org>
User-Agent: alot/0.8.1
Date:   Tue, 07 Jan 2020 09:52:21 -0800
Message-Id: <20200107175222.6B5052073D@mail.kernel.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Quoting Brian Masney (2020-01-07 04:03:17)
> On Sun, Jan 05, 2020 at 12:35:33AM -0800, Stephen Boyd wrote:
> > Quoting Brian Masney (2019-12-04 16:25:00)
> > > +examples:
> > > +  - |
> > > +    #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
> > > +    #include <dt-bindings/gpio/gpio.h>
> > > +
> > > +    vibrator {
> > > +        compatible =3D "clk-vibrator";
> > > +
> > > +        vcc-supply =3D <&pm8941_l19>;
> > > +
> > > +        clocks =3D <&mmcc CAMSS_GP1_CLK>;
> > > +        clock-names =3D "core";
> > > +        clock-frequency =3D <24000>;
> > > +
> > > +        enable-gpios =3D <&msmgpio 60 GPIO_ACTIVE_HIGH>;
> > > +
> > > +        pinctrl-names =3D "default";
> > > +        pinctrl-0 =3D <&vibrator_pin>;
> >=20
> > I'm still trying to wrap my head around this. I think we can have a pwm
> > provider in a clk controller node (so imagine &mmcc has #pwm-cells) and
> > then this 'clk-vibrator' binding wouldn't exist? Instead we would have
> > some sort of binding for a device that expects a pwm and whatever else
> > is required, like the enable gpio and power supply. Is there an actual
> > hardware block that is this way? Does it have a real product id and is
> > made by some company? Right now this looks a little too generic to not
> > just be a catch-all for something that buzzes.
>=20
> So have some of the Qualcomm clocks like this one register with both the
> clk and the pwm frameworks? I feel that approach would better represent
> the hardware in device tree.

That is one option. Or another option would be to have another node that
"adapts" a clk signal to a pwm provider. Similar to how we adapt a gpio
to make a clk gate or mux. Something like:

	gcc: clock-controller@f00d {
		reg =3D <0xf00d 0xd00d>;
		#clock-cells =3D <1>;
	};


	pwm {
		compatible =3D "pwm-clk";
		#pwm-cells =3D <0>;
		clocks =3D <&gcc 45>;
		assigned-clocks =3D <&gcc 45>;
		assigned-clock-rates =3D <1400000>;
	};

And then the pwm-clk driver would adjust the duty cycle to generate a
pwm.

>=20
> If we did that, then the pwm-vibra driver in the input subsystem could
> be used.