Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp163303ybl; Tue, 7 Jan 2020 16:21:08 -0800 (PST) X-Google-Smtp-Source: APXvYqwOFobuMWpAjGc00ezSofY4gQrgvGLhyRNTNHsyhhjwgR5Yo2+qUrfAZ4ansRhbb1w9vyxf X-Received: by 2002:aca:1309:: with SMTP id e9mr937335oii.7.1578442867949; Tue, 07 Jan 2020 16:21:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1578442867; cv=none; d=google.com; s=arc-20160816; b=dEdrOhlj60oM55lnsHr9A+gxZoO9lj1filvpm9AnYTYJeTjge8hmEzBBUrmvvavEny 7Xdj8/7tVEJdEihhtGlmF4bb88ROEa9UawbrkzuennxutcVBy3ZrZJ9Ixap20b/HKmkz OKFVW5HZ1u8mqvF4h6wrgNhYD02fXFmsiEOUi2rvZ7B/GXyFoYMhDHPgD9CBCNWHN3T7 8fnJEhacjOEwZ/tnbM6MATIRIl5T/obx9azpd+185vXEN5911LR4BeD+bowOTA23Ffi2 iznXlQ5gNdazTMuRJMho1F3gYVXb3WWm1Qq2P7gbjwu0IhxBq2HdDx9pE9a3Bv9rDjL5 ATHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=mfnRAuMM8OUbl7j6pa4Ts59yqkScpdzAKctJXR3uABw=; b=HMShojZxVFU1C1oD3/oQYBC2sG0KU16BSHJ177RUB7BZESrl4GbaJfXzMyT60S1nAg pwdy3eHQBEmZmqkBDatZ8zR4Qw7/Kvz09gSpvH+8UsId0D9wUR3rGAi/N8W21a6Ycr6j kPMwLaA9BkYJm+hYvgRo1lizTtN5wO1sKBlfW0FLWvS9iGoFrLq5WBOyXM0jyryuubR1 rnHH3MwrY/hVgke1PbPRiNB3RnndrQ6x0PJGnm3UAjGHfjNwXECUXRNRCMOFkbcu7KhZ 22eN1e2tbUGsCfUxH+otkyQZXelSvtCecCb0lI9kUr8wq3zgIhAivexoxF4SfaBXgfOX XVAw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d140si845281oig.269.2020.01.07.16.20.55; Tue, 07 Jan 2020 16:21:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727020AbgAHATB (ORCPT + 99 others); Tue, 7 Jan 2020 19:19:01 -0500 Received: from mga09.intel.com ([134.134.136.24]:45392 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726537AbgAHATA (ORCPT ); Tue, 7 Jan 2020 19:19:00 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jan 2020 16:19:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,407,1571727600"; d="scan'208";a="211360872" Received: from sjchrist-coffee.jf.intel.com ([10.54.74.202]) by orsmga007.jf.intel.com with ESMTP; 07 Jan 2020 16:19:00 -0800 From: Sean Christopherson To: Paolo Bonzini Cc: Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] KVM: x86/mmu: Fix a benign Bitwise vs. Logical OR mixup Date: Tue, 7 Jan 2020 16:18:59 -0800 Message-Id: <20200108001859.25254-1-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use a Logical OR in __is_rsvd_bits_set() to combine the two reserved bit checks, which are obviously intended to be logical statements. Switching to a Logical OR is functionally a nop, but allows the compiler to better optimize the checks. Signed-off-by: Sean Christopherson --- arch/x86/kvm/mmu/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 7269130ea5e2..72e845709027 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -3970,7 +3970,7 @@ __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) { int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f; - return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) | + return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) || ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0); } -- 2.24.1