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[209.132.180.67]) by mx.google.com with ESMTP id p83si1909300oih.198.2020.01.08.07.59.19; Wed, 08 Jan 2020 07:59:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728835AbgAHOUZ (ORCPT + 99 others); Wed, 8 Jan 2020 09:20:25 -0500 Received: from foss.arm.com ([217.140.110.172]:45232 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727487AbgAHOUZ (ORCPT ); Wed, 8 Jan 2020 09:20:25 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8F23B31B; Wed, 8 Jan 2020 06:20:24 -0800 (PST) Received: from [10.1.196.37] (e121345-lin.cambridge.arm.com [10.1.196.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0E4533F703; Wed, 8 Jan 2020 06:20:22 -0800 (PST) Subject: Re: [PATCH RFT v1 1/3] drm/panfrost: enable devfreq based the "operating-points-v2" property To: Martin Blumenstingl Cc: dri-devel@lists.freedesktop.org, alyssa@rosenzweig.io, steven.price@arm.com, tomeu.vizoso@collabora.com, robh@kernel.org, linux-kernel@vger.kernel.org, daniel@ffwll.ch, airlied@linux.ie, linux-amlogic@lists.infradead.org, linux-rockchip@lists.infradead.org, Sudeep Holla References: <20200107230626.885451-1-martin.blumenstingl@googlemail.com> <20200107230626.885451-2-martin.blumenstingl@googlemail.com> From: Robin Murphy Message-ID: Date: Wed, 8 Jan 2020 14:20:21 +0000 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [ +Sudeep ] On 08/01/2020 12:38 pm, Martin Blumenstingl wrote: > Hi Robin, > > On Wed, Jan 8, 2020 at 12:18 PM Robin Murphy wrote: >> >> On 07/01/2020 11:06 pm, Martin Blumenstingl wrote: >>> Decouple the check to see whether we want to enable devfreq for the GPU >>> from dev_pm_opp_set_regulators(). This is preparation work for adding >>> back support for regulator control (which means we need to call >>> dev_pm_opp_set_regulators() before dev_pm_opp_of_add_table(), which >>> means having a check for "is devfreq enabled" that is not tied to >>> dev_pm_opp_of_add_table() makes things easier). >> >> Hmm, what about cases like the SCMI DVFS protocol where the OPPs are >> dynamically discovered rather than statically defined in DT? > where can I find such an example (Amlogic SoCs use SCPI instead of > SCMI, so I don't think that I have any board with SCMI support) or > some documentation? > (I could only find SCPI clock and CPU DVFS implementations, but no > generic "OPPs for any device" implementation) On closer inspection I think this applies to the SCPI DVFS protocol too[1]. AIUI the fact that neither is wired up to a devfreq driver yet is merely due to lack of demand and suitable systems to develop/test on so far - the panfrost devfreq code is only now looking like the first viable upstream use-case ;) Robin. [1] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922g/BABFEBCD.html