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Subject: Re: SMP processor rework help needed
To: manfred@colorfullife.com (Manfred Spraul)
Date: Mon, 15 Oct 2001 22:39:34 +0100 (BST)
Cc: ebiederm@xmission.com (Eric W. Biederman), linux-kernel@vger.kernel.org
In-Reply-To: <3BCB19E0.64322276@colorfullife.com> from "Manfred Spraul" at Oct 15, 2001 07:16:16 PM
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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
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> Huh?
> 
> 24547202.pdf: (i.e. volume 3 of the ia32 SDM)
> <<<<<<<<
> The APIC ID register is loaded at power up by sampling configuration
> data that is driven onto pins of the processor. For the Pentium 4 and P6
> family processors, pins A11# and A12# and pins BR0# through BR3# are
> sampled; for the Pentium processor, pins BE0# through BE3# are sampled.
> <<<<<<

Dual Pentium at least has a mode where the boot processor is decided by a
boot time resolution - its valuable for HA uses.  I'm not sure if it affects
the APIC ident
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