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Subject: Re: [PATCH v7 00/21] Move PMC clocks into Tegra PMC driver
To:     Sowjanya Komatineni <skomatineni@nvidia.com>,
        Dmitry Osipenko <digetx@gmail.com>, <thierry.reding@gmail.com>,
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Date:   Fri, 10 Jan 2020 10:13:25 +0530
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On 1/10/2020 10:06 AM, Sowjanya Komatineni wrote:
>
> On 1/9/20 7:32 PM, Sowjanya Komatineni wrote:
>>
>> On 1/9/20 7:24 PM, Sowjanya Komatineni wrote:
>>>
>>> On 1/9/20 5:39 PM, Sowjanya Komatineni wrote:
>>>>
>>>> On 1/9/20 11:44 AM, Dmitry Osipenko wrote:
>>>>> External email: Use caution opening links or attachments
>>>>>
>>>>>
>>>>> 08.01.2020 07:24, Sowjanya Komatineni =D0=BF=D0=B8=D1=88=D0=B5=D1=82:
>>>>>> This patch series moves Tegra PMC clocks from clock driver to pmc=20
>>>>>> driver
>>>>>> along with the device trees changes and audio driver which uses=20
>>>>>> one of
>>>>>> the pmc clock for audio mclk.
>>>>>>
>>>>>> Tegra PMC has clk_out_1, clk_out_2, clk_out_3 and blink controls=20
>>>>>> which
>>>>>> are currently registered by Tegra clock driver using=20
>>>>>> clk_regiser_mux and
>>>>>> clk_register_gate which performs direct Tegra PMC register access.
>>>>>>
>>>>>> When Tegra PMC is in secure mode, any access from non-secure=20
>>>>>> world will
>>>>>> not go through.
>>>>>>
>>>>>> This patch series adds these Tegra PMC clocks and blink controls=20
>>>>>> to Tegra
>>>>>> PMC driver with PMC as clock provider and removes them from Tegra=20
>>>>>> clock
>>>>>> driver.
>>>>>>
>>>>>> PMC clock clk_out_1 is dedicated for audio mclk from Tegra30 thru=20
>>>>>> Tegra210
>>>>>> and clock driver does inital parent configuration for it and=20
>>>>>> enables them.
>>>>>> But this clock should be taken care by audio driver as there is=20
>>>>>> no need
>>>>>> to have this clock pre enabled.
>>>>>>
>>>>>> So, this series also includes patch that updates ASoC driver to take
>>>>>> care of parent configuration for mclk if device tree don't specify
>>>>>> initial parent configuration using assigned-clock-parents and=20
>>>>>> controls
>>>>>> audio mclk enable/disable during ASoC machine startup and shutdown.
>>>>>>
>>>>>> DTs are also updated to use clk_out_1 as audio mclk rather than=20
>>>>>> extern1.
>>>>>>
>>>>>> This series also includes a patch for mclk fallback to extern1 when
>>>>>> retrieving mclk fails to have this backward compatible of new DT=20
>>>>>> with
>>>>>> old kernels.
>>>>> Suspend-resume doesn't work anymore, reverting this series helps. I
>>>>> don't have any other information yet, please take a look.
>>>> Thanks Dmitry. Will test suspend resume and check..
>>>
>>> I see if we leave audio mclk (cdev1) enabled during=20
>>> tegra_asoc_utils_init, suspend resume works.
>>>
>>> Without audio mclk enabled during tegra_asoc_utils_init, somehow it=20
>>> prevents entry to suspend on Tegra30 platform.
>>>
>>> Will look in detail..
>>>
>> audio mclk is only needed for audio and werid that having it not=20
>> enabled all the time like in current clock driver prevents suspend=20
>> entry on Tegra30
>>
>> Looks like this issue is masked earlier with having mclk enabled all=20
>> the time by clock driver.
>>
> On linux-next without this patch series, I just disabled mclk to be=20
> enabled all the time (removed set_rate from utils_init) and also=20
> disabled default enable from clock driver.
>
> So somehow disabling mclk is preventing suspend entry.

This is strange.

>
> Probably debugging suspend issue on Tegra30 when audio mclk is=20
> disabled can be done separately and will keep audio mclk enabled in=20
> asoc_utils_init with comment mentioning this issue and fix as TBD to=20
> move on with PMC clock fixes.

Sounds fine with me as the suspend/resume issue is not introduced in the=20
current series. It can be addressed separately.

>
>
>