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Fri, 10 Jan 2020 07:17:47 +0000 From: Peng Fan To: "sboyd@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "festevam@gmail.com" , Abel Vesa , Leonard Crestez CC: "kernel@pengutronix.de" , dl-linux-imx , Aisheng Dong , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Anson Huang , Jacky Bai , Peng Fan Subject: [PATCH V2 1/4] clk: imx: composite-8m: add imx8m_clk_hw_composite_core Thread-Topic: [PATCH V2 1/4] clk: imx: composite-8m: add imx8m_clk_hw_composite_core Thread-Index: AQHVx4YROmU8DG5TrkiTcIEvRCTPVw== Date: Fri, 10 Jan 2020 07:17:51 +0000 Message-ID: <1578640411-16991-2-git-send-email-peng.fan@nxp.com> References: <1578640411-16991-1-git-send-email-peng.fan@nxp.com> In-Reply-To: <1578640411-16991-1-git-send-email-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR06CA0006.apcprd06.prod.outlook.com (2603:1096:202:2e::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: db54fddd-6379-4a4c-de84-08d7959d33f0 x-ms-traffictypediagnostic: AM0PR04MB7172:|AM0PR04MB7172: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3276; x-forefront-prvs: 02788FF38E x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(39860400002)(376002)(366004)(346002)(136003)(396003)(189003)(199004)(2906002)(478600001)(81156014)(81166006)(69590400006)(956004)(8936002)(4326008)(2616005)(44832011)(71200400001)(8676002)(6666004)(86362001)(6512007)(5660300002)(6486002)(186003)(16526019)(66476007)(66446008)(36756003)(66556008)(64756008)(66946007)(26005)(6506007)(6636002)(54906003)(316002)(52116002)(110136005);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR04MB7172;H:AM0PR04MB4481.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: qyp1gLIOaYzwqD8ehPjyL7LWYEGGwdEfUWK4zfDZl9wjomXg7NljdbFlB+znCVFm3kNCt1eNw2p7HXmwjcJ4kL1VwPCCAA0jW0iHH7lnAANmaN+dO4UAtAo9bPtDo9oguRUNZKERfvyrw/K5llisCL7RBMVu+3QqowTF6kCX4Sj4MNgxS9eZ1JS9LhpfU2oe/vwe6KCvRA069p03Ir/pvpJ1IZg22K4D0Jd4AFELQJMAj435ZwfsxL7APZMEt6JqQHfgc/Ln6nfmnE/gwCqSb38wVCoci1xGzKUyJQkLWBXgOgn+HkMpnjTErg8u+cpUAXkxmd96RUfeEDSJGjUlvsO3w2Lwjj3VACpOuNvFU/vggKFDo3huqr6RCNr9cKeCeylgNySH9dQQvC4O3r1vk4cDwlcWPtGbw1xjKVL69w5njW40xnf6alNOJtg9MEh7221R/0Y51ub0nLZ7SDdTcZFjz+q9h8C8h+KifFLgUM89UtILMMqO3jIICl+GwyjR Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: db54fddd-6379-4a4c-de84-08d7959d33f0 X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Jan 2020 07:17:51.2850 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 8hyCUhh/+z6zlvKhNaEpGrtgOysopFjoCaSWzsad1coZonp7pLw4KwGLGMaanctBcDBGe4XsgGMhg+pJb7dzYA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB7172 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan There are several clock slices, current composite code only support bus/ip clock slices, it could not support core slice. So introduce a new API imx8m_clk_hw_composite_core to support core slice. To core slice, post divider with 3 bits width and no pre divider. Other fields are same as bus/ip slices. Add a flag IMX_COMPOSITE_CORE for the usecase. Reviewed-by: Abel Vesa Signed-off-by: Peng Fan --- drivers/clk/imx/clk-composite-8m.c | 18 ++++++++++++++---- drivers/clk/imx/clk.h | 12 ++++++++++-- 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-compo= site-8m.c index 20f7c91c03d2..4869c16376bf 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -15,6 +15,7 @@ #define PCG_PREDIV_MAX 8 =20 #define PCG_DIV_SHIFT 0 +#define PCG_CORE_DIV_WIDTH 3 #define PCG_DIV_WIDTH 6 #define PCG_DIV_MAX 64 =20 @@ -126,6 +127,7 @@ static const struct clk_ops imx8m_clk_composite_divider= _ops =3D { struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, + u32 composite_flags, unsigned long flags) { struct clk_hw *hw =3D ERR_PTR(-ENOMEM), *mux_hw; @@ -133,6 +135,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char = *name, struct clk_divider *div =3D NULL; struct clk_gate *gate =3D NULL; struct clk_mux *mux =3D NULL; + const struct clk_ops *divider_ops; =20 mux =3D kzalloc(sizeof(*mux), GFP_KERNEL); if (!mux) @@ -150,8 +153,16 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char= *name, =20 div_hw =3D &div->hw; div->reg =3D reg; - div->shift =3D PCG_PREDIV_SHIFT; - div->width =3D PCG_PREDIV_WIDTH; + if (composite_flags & IMX_COMPOSITE_CORE) { + div->shift =3D PCG_DIV_SHIFT; + div->width =3D PCG_CORE_DIV_WIDTH; + divider_ops =3D &clk_divider_ops; + } else { + div->shift =3D PCG_PREDIV_SHIFT; + div->width =3D PCG_PREDIV_WIDTH; + divider_ops =3D &imx8m_clk_composite_divider_ops; + } + div->lock =3D &imx_ccm_lock; div->flags =3D CLK_DIVIDER_ROUND_CLOSEST; =20 @@ -166,8 +177,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char = *name, =20 hw =3D clk_hw_register_composite(NULL, name, parent_names, num_parents, mux_hw, &clk_mux_ops, div_hw, - &imx8m_clk_composite_divider_ops, - gate_hw, &clk_gate_ops, flags); + divider_ops, gate_hw, &clk_gate_ops, flags); if (IS_ERR(hw)) goto fail; =20 diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 65d80c675aa9..6f0d5e8fbbac 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -474,20 +474,28 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const= char *parent_name, struct clk *div, struct clk *mux, struct clk *pll, struct clk *step); =20 +#define IMX_COMPOSITE_CORE BIT(0) + struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, + u32 composite_flags, unsigned long flags); =20 +#define imx8m_clk_hw_composite_core(name, parent_names, reg) \ + imx8m_clk_hw_composite_flags(name, parent_names, \ + ARRAY_SIZE(parent_names), reg, \ + IMX_COMPOSITE_CORE, 0) + #define imx8m_clk_composite_flags(name, parent_names, num_parents, reg, \ flags) \ to_clk(imx8m_clk_hw_composite_flags(name, parent_names, \ - num_parents, reg, flags)) + num_parents, reg, 0, flags)) =20 #define __imx8m_clk_hw_composite(name, parent_names, reg, flags) \ imx8m_clk_hw_composite_flags(name, parent_names, \ - ARRAY_SIZE(parent_names), reg, \ + ARRAY_SIZE(parent_names), reg, 0, \ flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) =20 #define __imx8m_clk_composite(name, parent_names, reg, flags) \ --=20 2.16.4