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Cc:     linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, Manu Gautam <mgautam@codeaurora.org>,
        Sandeep Maheswaram <sanm@codeaurora.org>
Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sc7180: Remove global phy reset in QMP phy
To:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Doug Anderson <dianders@chromium.org>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Rob Herring <robh+dt@kernel.org>,
        Sandeep Maheswaram <sanm@codeaurora.org>
From:   Stephen Boyd <swboyd@chromium.org>
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Date:   Fri, 10 Jan 2020 08:52:49 -0800
Sender: linux-kernel-owner@vger.kernel.org
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Quoting Sandeep Maheswaram (2020-01-08 04:29:40)
> Remove global phy reset and do only usb phy reset in QMP phy.

Yes that's what this patch does, but you left out the important part:
Why?

>=20
> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>=20
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/q=
com/sc7180.dtsi
> index c00c3d4..448ab88 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1072,9 +1072,8 @@
>                                  <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>                         clock-names =3D "aux", "cfg_ahb", "ref", "com_aux=
";
> =20
> -                       resets =3D <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> -                                <&gcc GCC_USB3_PHY_PRIM_BCR>;
> -                       reset-names =3D "phy", "common";
> +                       resets =3D <&gcc GCC_USB3_PHY_PRIM_BCR>;
> +                       reset-names =3D "phy";
> =20

We shouldn't need to modify the DT node for this. The reset still goes
to this hardware block, so DT should reflect that. Instead, the driver
shouldn't drive this reset on this SoC.

>                         usb_1_ssphy: phy@88e9200 {
>                                 reg =3D <0 0x088e9200 0 0x128>,