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From:   Xing Li <lixing@loongson.cn>
To:     Ralf Baechle <ralf@linux-mips.org>,
        Paul Burton <paulburton@kernel.org>,
        James Hogan <jhogan@kernel.org>
Cc:     linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/3] KVM: MIPS: Fixup VPN2_MASK definition over 32bits virtual address
Date:   Mon, 13 Jan 2020 12:39:07 +0800
Message-Id: <1578890348-2734-2-git-send-email-lixing@loongson.cn>
In-Reply-To: <1578890348-2734-1-git-send-email-lixing@loongson.cn>
References: <1578890348-2734-1-git-send-email-lixing@loongson.cn>
Sender: linux-kernel-owner@vger.kernel.org
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If the cpu support more than 32bits vmbits, VPN2_MASK set to fixed
0xffffe000 will lead to wrong entryhi for _kvm_mips_host_tlb_inv

The cpu_vmbits definition of 32bit in cpu-features.h is 31,
so still use the old style for 32bits.

Signed-off-by: Xing Li <lixing@loongson.cn>
---
v2:
Change VPN2_MASK definition according to Jiaxun Yang's comment
 arch/mips/include/asm/kvm_host.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index 6be70d5..ef8e606 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -274,7 +274,11 @@ enum emulation_result {
 #define MIPS3_PG_SHIFT		6
 #define MIPS3_PG_FRAME		0x3fffffc0
 
+#if defined(CONFIG_64BIT)
+#define VPN2_MASK		GENMASK(cpu_vmbits - 1, 13)
+#else
 #define VPN2_MASK		0xffffe000
+#endif
 #define KVM_ENTRYHI_ASID	cpu_asid_mask(&current_cpu_data)
 #define TLB_IS_GLOBAL(x)	((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G)
 #define TLB_VPN2(x)		((x).tlb_hi & VPN2_MASK)
-- 
2.1.0