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[209.132.180.67]) by mx.google.com with ESMTP id n2si6356965otk.177.2020.01.13.02.29.17; Mon, 13 Jan 2020 02:29:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=DObAAOFb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728813AbgAMK2W (ORCPT + 99 others); Mon, 13 Jan 2020 05:28:22 -0500 Received: from mail-ed1-f68.google.com ([209.85.208.68]:44443 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726001AbgAMK2V (ORCPT ); Mon, 13 Jan 2020 05:28:21 -0500 Received: by mail-ed1-f68.google.com with SMTP id bx28so7960373edb.11; Mon, 13 Jan 2020 02:28:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=iMaJqGe+/87KiNUvJjKYz57OCMd9euJzaVWaUN0lP1s=; b=DObAAOFbSbrVsGeQHDd10Vzw+tqaEuBubMD9TEHteChXl3Os6q57ah95lTayO9eabr 4H8lfic+3PgOkOYTAmV9yTJ5Rd17E7OyzZZmH6MvfpcrduFUp2wPJuFxohfeg9RHwr1l XtNYo0ro+an7eUtSAAvkNbMR6TasOwacC/o0rhmpmTaMO4K9IvJ4kbQAAwny4MY9z6q/ +KLC9BGC9NsZS1hjdc//LeCh68StWNhrw5FHOZ15I/LsTIIfvhhzIFJ0v1RT/3CpXbgY QT19mQoAGaH9rq7xwv2sjdTE/NsDMw/GXBgONCEvOUpG56varewMdFKAHBZ6Pg23b5MK S/VQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=iMaJqGe+/87KiNUvJjKYz57OCMd9euJzaVWaUN0lP1s=; b=pYUlpSu0bVx3ikESa6a1g+6wV7OWUujW346vRTiPdavQ/OyV7f4EDSDwNoxCCX3K18 ygulSdfz+KGthmu26MK78Xg0VzUJRpfl6WapH84lh/lw8kXfS5eaxPs4AxNrxT5Bm2R/ 02n6DYnWKFNNVY9xKB7/31mhdgCdXDi/HlA7soyRx8+AO8ggYjEv4Bq/4DepUbpvOotM 7Gg9hwfU9VUws6AZXUJyisFTZwntwsYLgn1Bu6TnUZiifz+EnxtR1wmMawLY++cA6U9E 9rAuUhsFkL9DeHOY7YkYJ7sO9ECTBjLv0qKypX4FDMuriFpZxYVJ4fT0ln6w0I4sLmua r8kg== X-Gm-Message-State: APjAAAUxm7lJO5DLmbAhuKl8N0DbW4ad175S9kvY4HYkZD4qxPMLRF3+ MSU3JMU2kPicDNJEWkG6cehqD6OAQHUmwCaMZCw= X-Received: by 2002:a17:906:504d:: with SMTP id e13mr16068802ejk.103.1578911300006; Mon, 13 Jan 2020 02:28:20 -0800 (PST) MIME-Version: 1.0 References: <20191230143028.27313-1-alobakin@dlink.ru> <20191230143028.27313-6-alobakin@dlink.ru> <0002a7388dfd5fb70db4b43a6c521c52@dlink.ru> In-Reply-To: <0002a7388dfd5fb70db4b43a6c521c52@dlink.ru> From: Vladimir Oltean Date: Mon, 13 Jan 2020 12:28:09 +0200 Message-ID: Subject: Re: [PATCH RFC net-next 05/19] net: dsa: tag_ar9331: add GRO callbacks To: Alexander Lobakin Cc: Florian Fainelli , "David S. Miller" , Edward Cree , Andrew Lunn , Vivien Didelot , Hauke Mehrtens , Sean Wang , Matthias Brugger , Jiri Pirko , Eric Dumazet , Paolo Abeni , Jakub Kicinski , Taehee Yoo , Stephen Hemminger , Stanislav Fomichev , Daniel Borkmann , Song Liu , Matteo Croce , Jakub Sitnicki , Paul Blakey , Yoshiki Komachi , netdev , lkml , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 13 Jan 2020 at 11:46, Alexander Lobakin wrote: > > Vladimir Oltean wrote 13.01.2020 12:42: > > Hi Alexander, > > > > On Mon, 13 Jan 2020 at 11:22, Alexander Lobakin > > wrote: > >> > >> CPU ports can't be bridged anyway > >> > >> Regards, > >> =E1=9A=B7 =E1=9B=96 =E1=9A=A2 =E1=9A=A6 =E1=9A=A0 =E1=9A=B1 > > > > The fact that CPU ports can't be bridged is already not ideal. > > One can have a DSA switch with cascaded switches on each port, so it > > acts like N DSA masters (not as DSA links, since the taggers are > > incompatible), with each switch forming its own tree. It is desirable > > that the ports of the DSA switch on top are bridged, so that > > forwarding between cascaded switches does not pass through the CPU. > > Oh, I see. But currently DSA infra forbids the adding DSA masters to > bridges IIRC. Can't name it good or bad decision, but was introduced > to prevent accidental packet flow breaking on DSA setups. > I just wanted to point out that some people are going to be looking at ways by which the ETH_P_XDSA handler can be made to play nice with the master's rx_handler, and that it would be nice to at least not make the limitation worse than it is by converting everything to rx_handlers (which "currently" can't be stacked, from the comments in netdevice.h). > > -Vladimir > > Regards, > =E1=9A=B7 =E1=9B=96 =E1=9A=A2 =E1=9A=A6 =E1=9A=A0 =E1=9A=B1