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Date:   Mon, 13 Jan 2020 23:11:58 +0800
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Subject: Re: [PATCH 1/2] MIPS: Define pgprot_dmacoherent according to coherentio status
To:     Christoph Hellwig <hch@lst.de>
CC:     linux-mips@vger.kernel.org, chenhc@lemote.com,
        paul.burton@mips.com, linux-kernel@vger.kernel.org, hch@lst.de
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <6A037EB9-B5FE-462F-A6EA-8FD874432E75@flygoat.com>
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=E4=BA=8E 2020=E5=B9=B41=E6=9C=8813=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=881=
0:58:20, Christoph Hellwig <hch@lst=2Ede> =E5=86=99=E5=88=B0:
>On Mon, Jan 13, 2020 at 10:07:04PM +0800, Jiaxun Yang wrote:
>> For MIPS chips that support coherentio DMA, it's always safe
>> to make DMA requests cached=2E
>
>For DMA coherent devices pgprot_dmacoherent isn't even used, so this
>doesn't make sense=2E

Hi,

I'm supposed to use it later in drm/ttm
 ttm_bo_util to overwrite pgprot for TTM_PL_SYSTEM=2E
And I wish this pgropt can always represent dmacoherent pgropt=2E
Would it be fine?

Thanks

--=20
Jiaxun Yang