Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp4245624ybl;
        Mon, 13 Jan 2020 10:16:12 -0800 (PST)
X-Google-Smtp-Source: APXvYqxTENUogV9r8xz4f1LlxgX/LCq4nVQC7voUaWvvXHqVWABlH+Yzqqk4+Bb8jQuun4Zeq/jI
X-Received: by 2002:aca:c38c:: with SMTP id t134mr12983657oif.175.1578939372758;
        Mon, 13 Jan 2020 10:16:12 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1578939372; cv=none;
        d=google.com; s=arc-20160816;
        b=0Hj6gX5ql1BNdBcsoGDGXRSlYVPibGcUfmWvXgTCrMSEFXxQkoQ/jEIlUADqIjhR7e
         A/AFWTMTBdJly28ibW+ETyDUJ962M+M3VobqYGOQn7odFT6wX5rS4ROogWcw54AzBioI
         iDNBZCvQVAk+dnIVRFqPg0Tv60NIyZHQmBGTKyZuPqbVEuW3qXTJizYyibZN5KLBlLt7
         qk9ouFpIRU/SpN3z8XzqmdifvzEJppeP/0FSU3cJOU/h1VXkulAEAnXu1GBQGdecW2KW
         ngPzQZjLvA0CBNLW/h0J0rWiyTv4Qu55DgwNEc9B7qRQfj8FSswbyYhGSIuUK2eE6tcq
         oY0w==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=K+9LFI4HtbBcEoC9aRDmSR6jO1hjd1L8gzjO8ztF/1M=;
        b=0EnFFxkTFezfowDOryFINJ2UW7gPakkvFu/Pzml9TsPzMPtAMlct2A7mjwlc/6DXB1
         vlwaU4K9jPHRk+54hdULx1JM5j+N+lhd0pxm695tewH7QomO3KN812AFseAYUgvvYKtm
         4LuV4j70rQF9b5SHHFC98tIu5qepyUHbPdOiMTG6F1tL+83Xt7fjtsOvVIjqtThgyj56
         OjG//SFpeIyILmpKtUMCZ3X2xfAF61Y+sIVCpAxSWzCrl5tt648SXu1Q2Wj6UTPnk9GA
         w5hP26ZaxUK2C4t9COcMAFOfrv52WfC3j+M1sQnVvcd0n+lYBJojaPwXWzXsw2uUMxZA
         tS8w==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=a6f4a1aQ;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id o206si6245316oih.143.2020.01.13.10.16.00;
        Mon, 13 Jan 2020 10:16:12 -0800 (PST)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=a6f4a1aQ;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1728882AbgAMSOu (ORCPT <rfc822;schlichte.alexander@gmail.com>
        + 99 others); Mon, 13 Jan 2020 13:14:50 -0500
Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:18662 "EHLO
        hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1728633AbgAMSOu (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 13 Jan 2020 13:14:50 -0500
Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5e1cb3630000>; Mon, 13 Jan 2020 10:13:55 -0800
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate102.nvidia.com (PGP Universal service);
  Mon, 13 Jan 2020 10:14:49 -0800
X-PGP-Universal: processed;
        by hqpgpgate102.nvidia.com on Mon, 13 Jan 2020 10:14:49 -0800
Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL111.nvidia.com
 (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 13 Jan
 2020 18:14:48 +0000
Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Mon, 13 Jan 2020 18:14:48 +0000
Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.48]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5e1cb3940006>; Mon, 13 Jan 2020 10:14:48 -0800
From:   Vidya Sagar <vidyas@nvidia.com>
To:     <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
        <robh+dt@kernel.org>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <andrew.murray@arm.com>
CC:     <kishon@ti.com>, <gustavo.pimentel@synopsys.com>,
        <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
        <mmaddireddy@nvidia.com>, <vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V3 4/5] arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
Date:   Mon, 13 Jan 2020 23:44:10 +0530
Message-ID: <20200113181411.32743-5-vidyas@nvidia.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20200113181411.32743-1-vidyas@nvidia.com>
References: <20200113181411.32743-1-vidyas@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1578939235; bh=K+9LFI4HtbBcEoC9aRDmSR6jO1hjd1L8gzjO8ztF/1M=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=a6f4a1aQsTdHn06MMhyYUvt7Caug55b/EyrKvvhCaE0iUauC/Gv6fZMh99w2dipJ+
         Jv4hHkqfwTckqIQgkoKLyihKf6mmmJxb7vmKlHa3s9tkKEXGyhwy9ZnGRjSdLKZ710
         5f9tcQHCRgsDvuNUcBKWEyGdSzFdsuEIUXvj+bIOhjlI8vm1zTPRHE2gQeYJZZ7nrf
         ywGJNX6dx2VL/odgM2LaZjaNt1NiLj4HaK37zrDpWZUuNjE4qIWZf/pg9Ii8VmKiuW
         a9TSq05Uc5wOr2MEkNKKcgrCWFXk2rPKY81cBmr7emcQ1DUjejpy6N7IAVppE3Uc4l
         jkXYmPzWws2+Q==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Add endpoint mode support for PCIe C5 controller in P2972-0000 platform
with information about supplies, PHY, PERST GPIO and GPIO that controls
PCIe reference clock coming from the host system.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
V3:
* None

V2:
* Addressed Thierry's review comments
* Changed 'nvidia,pex-rst-gpio' to 'reset-gpios'
* Added 'nvidia,refclk-select-gpios'

 .../boot/dts/nvidia/tegra194-p2972-0000.dts    | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 353a6a22196d..87ae7c6d38e2 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -136,6 +136,24 @@
 			    "p2u-5", "p2u-6", "p2u-7";
 	};
 
+	pcie_ep@141a0000 {
+		status = "disabled";
+
+		vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+		reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
+
+		nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
+					      GPIO_ACTIVE_HIGH>;
+
+		phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
+		       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
+		       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
+
+		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
+			    "p2u-5", "p2u-6", "p2u-7";
+	};
+
 	fan: fan {
 		compatible = "pwm-fan";
 		pwms = <&pwm4 0 45334>;
-- 
2.17.1