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[209.85.167.47]) by smtp.gmail.com with ESMTPSA id y7sm6130427lfe.7.2020.01.13.11.44.42 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 13 Jan 2020 11:44:42 -0800 (PST) Received: by mail-lf1-f47.google.com with SMTP id r14so7820058lfm.5 for ; Mon, 13 Jan 2020 11:44:42 -0800 (PST) X-Received: by 2002:a19:22cc:: with SMTP id i195mr10887464lfi.148.1578944681789; Mon, 13 Jan 2020 11:44:41 -0800 (PST) MIME-Version: 1.0 References: <20200113154739.GB11244@42.do-not-panic.com> In-Reply-To: <20200113154739.GB11244@42.do-not-panic.com> From: Linus Torvalds Date: Mon, 13 Jan 2020 11:44:25 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: Fix built-in early-load Intel microcode alignment To: Luis Chamberlain Cc: Jari Ruusu , Borislav Petkov , Fenghua Yu , johannes.berg@intel.com, Linux Kernel Mailing List , stable Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 13, 2020 at 7:47 AM Luis Chamberlain wrote: > > So I'd like to determine first if we really need this. Then if so, > either add a new global config option, and worst comes to worst > figure out a way to do it per driver. I don't think we'd need it > per driver. I really don't think we need to have a config option for some small alignment. Increasing the alignment unconditionally to 16 bytes won't hurt anybody. Now, whether there might be other firmware loaders that need even more alignment, that might be an interesting question, and if such an alignment would be _huge_ we might want to worry about actual memory waste. But 16-byte alignment for a fw blob? That's nothing. Linus