Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp4896882ybl;
        Mon, 13 Jan 2020 23:28:21 -0800 (PST)
X-Google-Smtp-Source: APXvYqyXAh934WjxgeqBJ8MTPcftAjifFaq5KCpeNR5fmYnUuIb/3z7jqp1kf6U/dejRREDLZ7FF
X-Received: by 2002:a05:6808:907:: with SMTP id w7mr15886161oih.137.1578986901407;
        Mon, 13 Jan 2020 23:28:21 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1578986901; cv=none;
        d=google.com; s=arc-20160816;
        b=YD3zOEuQ87vrXMA846lNBeA4FfRZJKHRBlfQP8Tdk281kXXY1B2wZUi2IGjbqGlpgf
         pcpxTNiSwny0Z9BYXW4NUcoQAOrUhfFo9b83+mufUzxjGkldxiD1+8rAcnBsux4P8Dye
         89XyxrmN2LuU7S0QHVuz/lvilzyoJziCCBsaXviELxqJ3qI0MzmwOaddDH93QlCSltNd
         JKWWlqjNWYsdQe/6HDs2G6kSlyDbZdOsxqHxsVjzwpGvgF7wLtnKJJu5DnjX6hjC0sGI
         t3qUqp7pKRKdpFerTKZ56IOyJHaG9ovDX7pTQHN1OgOdWhETa4IE895a1AnmvgcvTkZ0
         ITug==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=0VMICKAqgNgQe8Ssepe6nckrz5SXX+WqrF2PVrkxSIw=;
        b=OoSR0fJjlMDr0q4ev/e4XEfoqbty1dXWV66Nx33xlv7u9t6SkzXiwEtei5CcyABZhe
         y++lNxnLOBM7k/bCGN2pf81z9FT/Z/1EQkAlAfiInBAHopN+i86Z/9WEDnjane0Lr/py
         wcg0BsjtOpAlRjTdd6V1ae8Mudhe0Xr9FlHpXf5CqDHvDvopHWr6TtzDJGj344Pnq57H
         kXkWpWwvDHx6Dp/TOllr7y2UHwPUqZYjVwM6Eb89dfolB3k994kUiBORy5GGmywnubBp
         QIefAoRBZS8nSjl66/fo1A6FNb+PXN5OcCPz/3wbRPQuvyRclGSwv1Gk8C8rhMiHxI4Z
         r/RQ==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=V1e5mMeJ;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id p25si7711361oto.191.2020.01.13.23.28.09;
        Mon, 13 Jan 2020 23:28:21 -0800 (PST)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=V1e5mMeJ;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1729139AbgANHZ5 (ORCPT <rfc822;gklkml16@gmail.com> + 99 others);
        Tue, 14 Jan 2020 02:25:57 -0500
Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:6449 "EHLO
        hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1729049AbgANHYg (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Tue, 14 Jan 2020 02:24:36 -0500
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5e1d6c9f0000>; Mon, 13 Jan 2020 23:24:15 -0800
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Mon, 13 Jan 2020 23:24:35 -0800
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Mon, 13 Jan 2020 23:24:35 -0800
Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 14 Jan
 2020 07:24:35 +0000
Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL109.nvidia.com
 (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Tue, 14 Jan 2020 07:24:35 +0000
Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.169.242]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5e1d6cb20002>; Mon, 13 Jan 2020 23:24:35 -0800
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <broonie@kernel.org>,
        <lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>,
        <digetx@gmail.com>, <mperttunen@nvidia.com>,
        <gregkh@linuxfoundation.org>, <sboyd@kernel.org>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>
CC:     <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
        <spujar@nvidia.com>, <josephl@nvidia.com>,
        <daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>,
        <markz@nvidia.com>, <devicetree@vger.kernel.org>,
        <linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
Subject: [PATCH v8 09/22] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock
Date:   Mon, 13 Jan 2020 23:24:14 -0800
Message-ID: <1578986667-16041-10-git-send-email-skomatineni@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com>
References: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1578986656; bh=0VMICKAqgNgQe8Ssepe6nckrz5SXX+WqrF2PVrkxSIw=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=V1e5mMeJUYidN7M0iU8mlHs28nuGye4mGA9fFprhJuiSx4dtsfs09VDJ+V2YT+K/P
         zKC+5Hp4T8Pr1WYx0aT56hFWSRUQ4w84d2EsxVP2NZNJtLMMxQrySGr/lg2HQG3SBr
         oGrc7owu2cQJ7+pbSLgGg6NVTP1v6YpAXBM1WTax5KLtJVg4PdEZ2IIUb1/+Fq93hM
         0fB7FL2NdHREsV2A/6Rh7dmmI5E+soZM1u1RANrNWpFGa7LStjy8H2XHhtwPqnexo7
         wfFe5efTZHrRYs62k4Sr2bPetT/XwKwDzm3R4senlPs0R3GZ6mZMgSfPKsL5f3QfID
         iXyhrX2Cef0Kg==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Tegra PMC has blink functionality that allows 32KHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 2 ++
 include/dt-bindings/soc/tegra-pmc.h                                 | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
index 5b5c42a00264..f17bb353f65e 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
@@ -44,6 +44,8 @@ properties:
     const: 1
     description:
       Tegra PMC has clk_out_1, clk_out_2, and clk_out_3.
+      PMC also has blink control which allows 32Khz clock output to
+      Tegra blink pad.
       Consumer of PMC clock should specify the desired clock by having
       the clock ID in its "clocks" phandle cell with pmc clock provider.
       See include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC
diff --git a/include/dt-bindings/soc/tegra-pmc.h b/include/dt-bindings/soc/tegra-pmc.h
index f7c866404456..a99a457471ee 100644
--- a/include/dt-bindings/soc/tegra-pmc.h
+++ b/include/dt-bindings/soc/tegra-pmc.h
@@ -9,7 +9,8 @@
 #define TEGRA_PMC_CLK_OUT_1		0
 #define TEGRA_PMC_CLK_OUT_2		1
 #define TEGRA_PMC_CLK_OUT_3		2
+#define TEGRA_PMC_CLK_BLINK		3
 
-#define TEGRA_PMC_CLK_MAX		3
+#define TEGRA_PMC_CLK_MAX		4
 
 #endif	/* _DT_BINDINGS_SOC_TEGRA_PMC_H */
-- 
2.7.4