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From:   Chen-Yu Tsai <wens@kernel.org>
To:     Maxime Ripard <mripard@kernel.org>
Cc:     Chen-Yu Tsai <wens@csie.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] ARM: dts: sun8i: a83t: Fix incorrect clk and reset macros for EMAC device
Date:   Tue, 14 Jan 2020 17:42:52 +0800
Message-Id: <20200114094252.8908-1-wens@kernel.org>
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From: Chen-Yu Tsai <wens@csie.org>

When the raw numbers used for clk and reset indices in the EMAC device
node were converted to the new macros, the order of the clk and reset
properties was overlooked, and thus the incorrect macros were used.
This results in the EMAC being non-responsive, as well as an oops due
to incorrect usage of the reset control.

Correct the macro types, and also reorder the clk and reset properties
to match all the other device nodes.

Fixes: 765866edb16a ("ARM: dts: sunxi: Use macros for references to CCU clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---

Error on my part. Hope no one was affected for too long.

---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383c..e7b9bef1be6b 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -1006,10 +1006,10 @@ emac: ethernet@1c30000 {
 			reg = <0x01c30000 0x104>;
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
-			resets = <&ccu CLK_BUS_EMAC>;
-			reset-names = "stmmaceth";
-			clocks = <&ccu RST_BUS_EMAC>;
+			clocks = <&ccu CLK_BUS_EMAC>;
 			clock-names = "stmmaceth";
+			resets = <&ccu RST_BUS_EMAC>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 
 			mdio: mdio {
-- 
2.24.1