Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp6968039ybl; Wed, 15 Jan 2020 13:12:22 -0800 (PST) X-Google-Smtp-Source: APXvYqz8+lcPYAizCZxtaLUiB0ejLxYS0e2WcdwDVU6sW33HEpfOnL+BtYTbFEjalh8P8k4iMCme X-Received: by 2002:a05:6808:f:: with SMTP id u15mr1562497oic.100.1579122742612; Wed, 15 Jan 2020 13:12:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1579122742; cv=none; d=google.com; s=arc-20160816; b=kZZ9MYFl9PJY/Tts3hqbE4w+q7lYs2+5Lw2ktwNiW4O4TNJTjlc+NAUOpKB+dopEY2 8G9uSiG5kvdRLaiDz00o6A9Xh+aruUsrYYq8KHmguWEOcIwam300AzBbe9B9PGJ5QOFd Yg8NT/GLir9Ffh/fUsKzk5+g47avGqMV5tu0/GliuPn0JFiW84GqRhmBWi3qWQIMbGMG PTVeqHktJBxKk+BHgm063biMElnDfR9T5hniOSs3YclgKKRcn3dDYhHS2P2CDPoe5m2B 9iL2SFA0fFyt+RjD6lGivKW/A7L4R2ZLjjkCpiapzjsfYTdtp2KlcgSlSJ+z/Rut67rw ldPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:in-reply-to:subject:cc:to:from; bh=oRs1Go9sFMy9qY/3U9XJJSe1mMTf3m931SasNtpGuns=; b=BxEx8CAbc8tOetZfgYz8EDrcXwRQ6SvMwUz/LgBnZTCH2u6NYpgJ/r530vqLHQW58e O7pPF6IkXeB94NLRuc4SCV4MW0phu4xvqvvgDtJ951bCOeH+d+18COFHtemt8OQ+NrD9 +AnB47BPQzivE2gjsaKKOAeLlfD8FZ+Y61cA/1WQnX7VWiKbg4Aym75BghwZlZW4CN8q SI+i5AWAxqKjT+xzfb5oFt8n6VP+jvDJXKbprp00uNDA4G2NdEIBUbbCBAsW+ROGXsmY r5TH/4xwHz71HuhOiQ4VFgmOeQWP+2OCrNR7sgsrl5gooS2R5wlfDX7kNUPJqEj2IgnS DL/A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h18si11361519otr.265.2020.01.15.13.12.09; Wed, 15 Jan 2020 13:12:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729536AbgAOTyV convert rfc822-to-8bit (ORCPT + 99 others); Wed, 15 Jan 2020 14:54:21 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:48732 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729061AbgAOTyV (ORCPT ); Wed, 15 Jan 2020 14:54:21 -0500 Received: from p5b06da22.dip0.t-ipconnect.de ([91.6.218.34] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1irok3-0007vi-TD; Wed, 15 Jan 2020 20:54:16 +0100 Received: by nanos.tec.linutronix.de (Postfix, from userid 1000) id 5D242101228; Wed, 15 Jan 2020 20:54:15 +0100 (CET) From: Thomas Gleixner To: Paul Cercueil , Maarten ter Huurne Cc: Daniel Lezcano , od@zcrc.me, linux-kernel@vger.kernel.org, Mathieu Malaterre , Artur Rojek Subject: Re: [PATCH v3] clocksource: Add driver for the Ingenic JZ47xx OST In-Reply-To: <1579110897.3.0@crapouillou.net> Date: Wed, 15 Jan 2020 20:54:15 +0100 Message-ID: <87y2u8xzq0.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Paul Cercueil writes: > Le mer., janv. 15, 2020 at 18:48, Maarten ter Huurne > a écrit : >> On Wednesday, 15 January 2020 14:57:01 CET Paul Cercueil wrote: >>> Le mer., janv. 15, 2020 at 14:44, Daniel Lezcano >>> a écrit : >>> > Is the JZ47xx OST really a mfd needing a regmap? (Note regmap_read >>> > will take a lock). >>> >>> Yes, the TCU_REG_OST_TCSR register is shared with the clocks driver. >> >> The TCU_REG_OST_TCSR register is only used in the probe though. >> >> To get the counter value from TCU_REG_OST_CNTL/TCU_REG_OST_CNTH you >> could technically do it by reading the register directly, if >> performance >> concerns make it necessary to bypass the usual kernel infrastructure >> for >> dealing with shared registers. > > In theory yes, in practice there's no easy way to do that (the > underlying mmio pointer is not obtainable from the regmap), and > besides, the lock is just a spinlock and not a mutex. That lock still a massive contention point as clock readouts can be pretty frequent depending on workloads. Just think about tracing ... So I really would avoid both the lock and that ugly 64bit readout thing. Thanks, tglx