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[209.132.180.67]) by mx.google.com with ESMTP id a7si11527530otp.284.2020.01.15.13.31.11; Wed, 15 Jan 2020 13:31:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=dvMTh5Gu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729397AbgAOU7P (ORCPT + 99 others); Wed, 15 Jan 2020 15:59:15 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:44118 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726513AbgAOU7O (ORCPT ); Wed, 15 Jan 2020 15:59:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1579121953; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4paQuRZq0NUIdHcv3ACilWGUqXPTdvt/21N1Xcd0KR8=; b=dvMTh5GuNIvo92DiEWQvaumTSH3LuuU/NsgvlJAOvRud06WBnpXxE9Q9utf7JBINKULob3 MeQ2Q5kD9dfa3oaV/0/eqyg5IHAg2T460vaKQcNFJ5uaGKeKVCTkYUc3BHPukNXISTuuuH l3NKmlN0vvEIHiXieOz6QMy0lQ1MFIA= Date: Wed, 15 Jan 2020 17:58:56 -0300 From: Paul Cercueil Subject: Re: [PATCH v3] clocksource: Add driver for the Ingenic JZ47xx OST To: Thomas Gleixner Cc: Maarten ter Huurne , Daniel Lezcano , od@zcrc.me, linux-kernel@vger.kernel.org, Mathieu Malaterre , Artur Rojek Message-Id: <1579121936.3.1@crapouillou.net> In-Reply-To: <87y2u8xzq0.fsf@nanos.tec.linutronix.de> References: <1579110897.3.0@crapouillou.net> <87y2u8xzq0.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le mer., janv. 15, 2020 at 20:54, Thomas Gleixner =20 a =E9crit : > Paul Cercueil writes: >> Le mer., janv. 15, 2020 at 18:48, Maarten ter Huurne >> a =E9crit : >>> On Wednesday, 15 January 2020 14:57:01 CET Paul Cercueil wrote: >>>> Le mer., janv. 15, 2020 at 14:44, Daniel Lezcano >>>> a =E9crit : >>>> > Is the JZ47xx OST really a mfd needing a regmap? (Note=20 >>>> regmap_read >>>> > will take a lock). >>>>=20 >>>> Yes, the TCU_REG_OST_TCSR register is shared with the clocks=20 >>>> driver. >>>=20 >>> The TCU_REG_OST_TCSR register is only used in the probe though. >>>=20 >>> To get the counter value from TCU_REG_OST_CNTL/TCU_REG_OST_CNTH you >>> could technically do it by reading the register directly, if >>> performance >>> concerns make it necessary to bypass the usual kernel=20 >>> infrastructure >>> for >>> dealing with shared registers. >>=20 >> In theory yes, in practice there's no easy way to do that (the >> underlying mmio pointer is not obtainable from the regmap), and >> besides, the lock is just a spinlock and not a mutex. >=20 > That lock still a massive contention point as clock readouts can be=20 > pretty > frequent depending on workloads. Just think about tracing ... >=20 > So I really would avoid both the lock and that ugly 64bit readout=20 > thing. The 64bit readout thing is gone in V3. The lock cannot go away unless we have a way to retrieve the underlying=20 mmio pointer from the regmap, which the regmap maintainers will never=20 accept. So I can't really change that now. Besides,=20 drivers/clocksource/ingenic-timer.c also registers a clocksource that's=20 read with the regmap, and nobody complained. -Paul =