Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp7353098ybl; Wed, 15 Jan 2020 21:13:27 -0800 (PST) X-Google-Smtp-Source: APXvYqwm3FztmZ7+Cg8IZzBwoy9QwsTw6mKjDKkqoKi5++WDjRZsqd93DEnb+geSKoT3MgkyyzQV X-Received: by 2002:a05:6808:64d:: with SMTP id z13mr2865991oih.104.1579151607775; Wed, 15 Jan 2020 21:13:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1579151607; cv=none; d=google.com; s=arc-20160816; b=UMEwE1cFYoqBOgpbckdqBPN2BwW1U+B5AmvBvgMnPJAaun3Jfcn2uX+5aZnYuVpYNl kjtpcHDJskziHixX0Q/tnIXrD03gir9boLWKwvSubgo8ojpnXoLl50YhyJtgPpyxIttp ahe+Fh7K1tVlDUSySCPkeFgp6VvESO6IWZHwYwqI6lW9nVjha0lpope6mjwLREdi8J0p I+nAUhOMPd3GIjwOdqurtY/o1UpvRPMwLsH+F+ANk2dnjcTX8tHoE8WwVHgg2+YjazTj nojbIePrKL3aqiQN/FPTxY2E7M1UtJHuYfdWrHS3OhrA521e0vXMgzbUrRycJ8ipFS5N NWMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=6ThXbBxeloPcXyy0fNhLj5TodGdo2OU1s/DJlw78Bfs=; b=ZG9hFXgR1WHXnHiWwrF5v2ve2Q6OLJR3FsnJgiSbNqaNnoN2HbwLO5iRBgPnmCizgT s4apy8dIXv+q+55qpCuSJ4oZU1tMXRB1/hauhdYZHC2whMtzBZRL/UiskDUJUy9DAaXU 5pMT/ExonCXkm/6DN882n7TIE5TT0nGODJbNNQ0Ni0Wd+ZSvGicOwlAPN/7r+N59/khy tMmXf9DC9WMQ6fToMj/XCEVzzt1nqZJhxv5/4X8RsFEme6j1zfAXsoGpXWDLoJaQD9Re zhlBAt8kWaWCeySq6wfeMD5ognONiYOf/VvMdemAqfouDjexu+Zn/zbfeyUwSgnhn5yY AfyQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q26si10055455oij.38.2020.01.15.21.13.15; Wed, 15 Jan 2020 21:13:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729816AbgAPDvb (ORCPT + 99 others); Wed, 15 Jan 2020 22:51:31 -0500 Received: from ZXSHCAS2.zhaoxin.com ([203.148.12.82]:26363 "EHLO ZXSHCAS2.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728925AbgAPDva (ORCPT ); Wed, 15 Jan 2020 22:51:30 -0500 Received: from zxbjmbx1.zhaoxin.com (10.29.252.163) by ZXSHCAS2.zhaoxin.com (10.28.252.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 16 Jan 2020 11:51:28 +0800 Received: from [10.32.64.11] (10.32.64.11) by zxbjmbx1.zhaoxin.com (10.29.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 16 Jan 2020 11:51:27 +0800 Subject: Re: [PATCH] x86/cpu: clear X86_BUG_SPECTRE_V2 on Zhaoxin family 7 CPUs To: Thomas Gleixner , , , , , CC: , , , References: <1579075500-7065-1-git-send-email-TonyWWang-oc@zhaoxin.com> <87h80wxsze.fsf@nanos.tec.linutronix.de> From: Tony W Wang-oc Message-ID: Date: Thu, 16 Jan 2020 11:51:39 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <87h80wxsze.fsf@nanos.tec.linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.32.64.11] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx1.zhaoxin.com (10.29.252.163) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/01/2020 06:19, Thomas Gleixner wrote: > Tony W Wang-oc writes: > >> These CPUs are not affected by spectre_v2, so clear spectre_v2 bug flag >> in their specific initialization code. >> >> if (cpu_has(c, X86_FEATURE_VMX)) >> centaur_detect_vmx_virtcap(c); >> + >> + if (c->x86 == 7) { >> + setup_clear_cpu_cap(X86_BUG_SPECTRE_V2); >> + clear_bit(X86_BUG_SPECTRE_V2, (unsigned long *)cpu_caps_set); > > No. Please use cpu_vuln_whitelist. It exists for exactly this > purpose. You just need to extend it with a NO_SPECTRE_V2 bit. Got, done. Sincerely TonyWWang-oc