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Thu, 16 Jan 2020 09:36:53 +0000 From: Peng Fan To: "shawnguo@kernel.org" , "s.hauer@pengutronix.de" CC: "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "allison@lohutok.net" , "info@metux.net" , Anson Huang , Leonard Crestez , "git@andred.net" , Abel Vesa , "ard.biesheuvel@linaro.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Peng Fan Subject: [RFC 3/4] ARM: imx: move cpu definitions into a header Thread-Topic: [RFC 3/4] ARM: imx: move cpu definitions into a header Thread-Index: AQHVzFB+G3o1/8PlD0Sf3//E6frY/A== Date: Thu, 16 Jan 2020 09:36:57 +0000 Message-ID: <1579167145-1480-4-git-send-email-peng.fan@nxp.com> References: <1579167145-1480-1-git-send-email-peng.fan@nxp.com> In-Reply-To: <1579167145-1480-1-git-send-email-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR0302CA0022.apcprd03.prod.outlook.com (2603:1096:202::32) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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x-microsoft-antispam-message-info: UjHwxXi9OLfgWozZHI+n2W0hWQu+9DZZsngWID2s5UoGUaEXqC6HwO4iLwR6sop1pFhllhvxJjltE6ee9/Q53ud9e3yIBRgo6DyWSPm/UHqjSiiTYXzxvRzqckk1zOeaHN0wE62E5KMZvOyoMWvPvVyveraziW6YwwCo2sdYEdzv0/huwD40FoZGOST83upuL9emayNan5Oi6WE7ThQd6rx2UdmocDX7E8vtav69S/8VAY5ux8DgP2pB/FU93uMDi0RQP+kckG3og6s3Y53ZUuuKdkQ2EWcdPcr0EfBDTZBmugljB5D7T7NCf75QOcH9BHPnpHqC/xD6aWFf3ewBsV3N41bR2yN+CN5jyVHIwMCyfg/BxaX20XL+9SiXM1Ssll+SlE2557wqmx7aaSwqyWAaKcj9M1cj8GfvNHJqAagNJZecqqEx+XdooOULmJUyafFRBpFmQVFtYhI+eGxKaNjCqU2yFhBNuolqyFBjNzlxdbImoS2CRl+Y/Ogu+DV/ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6e41dfa4-2b21-48ac-ad83-08d79a67a14e X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Jan 2020 09:36:57.6330 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ALl+g3ALjXIZXavXA4/xVKtWHaW3K6dEEchDGfBdg6g7u+BvLVU9vm2FLfwQAT1MORqhyIo/LaiMQR88Dsue8w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4337 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan The soc device register code will be moved to drivers/soc/imx/, the code needs the cpu type definitions. So let's move the cpu type definitions to a header. Signed-off-by: Peng Fan --- arch/arm/mach-imx/mxc.h | 22 +--------------------- include/soc/imx/cpu.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 21 deletions(-) create mode 100644 include/soc/imx/cpu.h diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 2bfd2d59b4a6..fe2d0f5abfcc 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -8,35 +8,15 @@ #define __ASM_ARCH_MXC_H__ =20 #include +#include =20 #ifndef __ASM_ARCH_MXC_HARDWARE_H__ #error "Do not include directly." #endif =20 -#define MXC_CPU_MX1 1 -#define MXC_CPU_MX21 21 -#define MXC_CPU_MX25 25 -#define MXC_CPU_MX27 27 -#define MXC_CPU_MX31 31 -#define MXC_CPU_MX35 35 -#define MXC_CPU_MX51 51 -#define MXC_CPU_MX53 53 -#define MXC_CPU_IMX6SL 0x60 -#define MXC_CPU_IMX6DL 0x61 -#define MXC_CPU_IMX6SX 0x62 -#define MXC_CPU_IMX6Q 0x63 -#define MXC_CPU_IMX6UL 0x64 -#define MXC_CPU_IMX6ULL 0x65 -/* virtual cpu id for i.mx6ulz */ -#define MXC_CPU_IMX6ULZ 0x6b -#define MXC_CPU_IMX6SLL 0x67 -#define MXC_CPU_IMX7D 0x72 -#define MXC_CPU_IMX7ULP 0xff - #define IMX_DDR_TYPE_LPDDR2 1 =20 #ifndef __ASSEMBLY__ -extern unsigned int __mxc_cpu_type; =20 #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h new file mode 100644 index 000000000000..0669fc08a501 --- /dev/null +++ b/include/soc/imx/cpu.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __IMX_CPU_H__ +#define __IMX_CPU_H__ + +#define MXC_CPU_MX1 1 +#define MXC_CPU_MX21 21 +#define MXC_CPU_MX25 25 +#define MXC_CPU_MX27 27 +#define MXC_CPU_MX31 31 +#define MXC_CPU_MX35 35 +#define MXC_CPU_MX51 51 +#define MXC_CPU_MX53 53 +#define MXC_CPU_IMX6SL 0x60 +#define MXC_CPU_IMX6DL 0x61 +#define MXC_CPU_IMX6SX 0x62 +#define MXC_CPU_IMX6Q 0x63 +#define MXC_CPU_IMX6UL 0x64 +#define MXC_CPU_IMX6ULL 0x65 +/* virtual cpu id for i.mx6ulz */ +#define MXC_CPU_IMX6ULZ 0x6b +#define MXC_CPU_IMX6SLL 0x67 +#define MXC_CPU_IMX7D 0x72 +#define MXC_CPU_IMX7ULP 0xff + +#ifndef __ASSEMBLY__ +extern unsigned int __mxc_cpu_type; +#endif + +#endif --=20 2.16.4