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Thu, 16 Jan 2020 07:04:15 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id g22sm24354714pgk.85.2020.01.16.07.04.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jan 2020 07:04:14 -0800 (PST) Subject: Re: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro To: Srinivas Neeli , michal.simek@xilinx.com, shubhrajyoti.datta@xilinx.com, sgoud@xilinx.com Cc: wim@linux-watchdog.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, git@xilinx.com References: <1579181217-31127-1-git-send-email-srinivas.neeli@xilinx.com> <1579181217-31127-3-git-send-email-srinivas.neeli@xilinx.com> From: Guenter Roeck Message-ID: <3f904c30-32e2-914a-9545-9cd554b45bfe@roeck-us.net> Date: Thu, 16 Jan 2020 07:04:12 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <1579181217-31127-3-git-send-email-srinivas.neeli@xilinx.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/16/20 5:26 AM, Srinivas Neeli wrote: > From: Srinivas Goud > > Used BIT macro instead of mask value. > > Signed-off-by: Srinivas Goud > Signed-off-by: Michal Simek > --- > drivers/watchdog/of_xilinx_wdt.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c > index 00549164b3d7..0d7df2370db7 100644 > --- a/drivers/watchdog/of_xilinx_wdt.c > +++ b/drivers/watchdog/of_xilinx_wdt.c > @@ -24,12 +24,12 @@ > #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */ > > /* Control/Status Register Masks */ > -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */ > -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */ > -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */ > +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */ > +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */ > +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */ > > /* Control/Status Register 0/1 bits */ > -#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */ > +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */ > > /* SelfTest constants */ > #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000 > Using bitops also requires including linux/bits.h explicitly. Guenter