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Date:   Thu, 16 Jan 2020 21:27:07 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To:     Jeffrey Hugo <jhugo@codeaurora.org>, Will Deacon <will@kernel.org>
Cc:     Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
        Marc Zyngier <maz@kernel.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        Douglas Anderson <dianders@chromium.org>,
        Matthias Kaehlcke <mka@chromium.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andre Przywara <andre.przywara@arm.com>,
        James Morse <james.morse@arm.com>,
        Stephen Boyd <swboyd@chromium.org>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
In-Reply-To: <1a114449-8026-b99d-a4ce-93aac2ffdcb3@codeaurora.org>
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 <20200116153235.GA18909@willie-the-truck>
 <1a114449-8026-b99d-a4ce-93aac2ffdcb3@codeaurora.org>
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Hi Jeffrey,

On 2020-01-16 21:12, Jeffrey Hugo wrote:
> On 1/16/2020 8:32 AM, Will Deacon wrote:
>> [+Jeffrey]
>> 
>> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>>> are not affected by Spectre variant 2. Add them to spectre_v2
>>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>>> vulnerability sysfs value.
>>> 
>>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>>> ---
>>>   arch/arm64/include/asm/cputype.h | 6 ++++++
>>>   arch/arm64/kernel/cpu_errata.c   | 3 +++
>>>   2 files changed, 9 insertions(+)
>>> 
>>> diff --git a/arch/arm64/include/asm/cputype.h 
>>> b/arch/arm64/include/asm/cputype.h
>>> index aca07c2f6e6e..7219cddeba66 100644
>>> --- a/arch/arm64/include/asm/cputype.h
>>> +++ b/arch/arm64/include/asm/cputype.h
>>> @@ -85,6 +85,9 @@
>>>   #define QCOM_CPU_PART_FALKOR_V1		0x800
>>>   #define QCOM_CPU_PART_FALKOR		0xC00
>>>   #define QCOM_CPU_PART_KRYO		0x200
>>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER	0x803
>>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD	0x804
>>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER	0x805
>> 
>> Jeffrey is the only person I know who understands the CPU naming here, 
>> so
>> I've added him in case this needs either renaming or extending to 
>> cover
>> other CPUs. I wouldn't be at all surprised if we need a function call
>> rather than a bunch of table entries...
> 
> The added lines look sane to me, from a naming and MIDR perspective.
> I don't know off hand if these CPUs are really fixed or not.
> 
> I wonder why a "KRYO_3XX_GOLD  0x802" line is not being added.  Sai?
> 

KRYO_3XX_GOLD is based on Cortex-A75 which is not spectre v2 safe.

Thanks,
Sai

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