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[209.132.180.67]) by mx.google.com with ESMTP id f189si13936543oib.268.2020.01.17.05.53.46; Fri, 17 Jan 2020 05:53:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727665AbgAQNwZ (ORCPT + 99 others); Fri, 17 Jan 2020 08:52:25 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:42135 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726885AbgAQNwY (ORCPT ); Fri, 17 Jan 2020 08:52:24 -0500 Received: from kresse.hi.pengutronix.de ([2001:67c:670:100:1d::2a]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1isS2q-0003bt-CJ; Fri, 17 Jan 2020 14:52:16 +0100 Message-ID: Subject: Re: [EXT] [PATCH] PCI: imx6: Add L1SS support for i.MX8MQ From: Lucas Stach To: Andrey Smirnov , Richard Zhu Cc: "linux-pci@vger.kernel.org" , Lorenzo Pieralisi , Bjorn Helgaas , Chris Healy , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Date: Fri, 17 Jan 2020 14:52:14 +0100 In-Reply-To: References: <20200114170231.16421-1-andrew.smirnov@gmail.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Do, 2020-01-16 at 06:37 -0800, Andrey Smirnov wrote: > On Tue, Jan 14, 2020 at 7:26 PM Richard Zhu wrote: > > > > > -----Original Message----- > > > From: Andrey Smirnov > > > Sent: 2020年1月15日 1:03 > > > To: linux-pci@vger.kernel.org > > > Cc: Andrey Smirnov ; Lorenzo Pieralisi > > > ; Bjorn Helgaas ; Chris > > > Healy ; Lucas Stach ; Richard > > > Zhu ; dl-linux-imx ; > > > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org > > > Subject: [EXT] [PATCH] PCI: imx6: Add L1SS support for i.MX8MQ > > > > > > Caution: EXT Email > > > > > > Add code to configure PCI IP block to utilize supported ASPM features. > > > > > > Signed-off-by: Andrey Smirnov > > [Richard Zhu] HI Andrey: > > This patch does the regmap to the src region, right? > > Indeed. > > > How about to add another reset to manipulate the *_OVERRIDE bit. > > Just like the following bits. > > resets = <&src IMX8MQ_RESET_PCIEPHY>, > > <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, > > <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; > > reset-names = "pciephy", "apps", "turnoff"; > > > > Last time I talked to Philipp Zabel (maintainer of reset subsystem) he > made it pretty clear that he though that exposing those PCIe related > bits via reset subsystem (for both imx7 and imx8mq) was a mistake and > going forward he'd like to see only true reset functionality to be > exposed that way. IMX8MQ_PCIE_CTRL_APPS_CLK_REQ is definitely not a > reset line, so the case for adding it to reset driver is even weaker. > > Lucas, do you mind sharing your thoughts on this? While I'm not too happy that we are now going to have multiple paths to those PCIe related control bits in the driver, I totally agree that we should stop abusing the reset API for things that aren't a reset. Maybe we should even go all the way and switch the APPS_EN bit manipulation to use the regmap instead of the reset. This would be a DT compatible change, as we would just ignore the apps reset specified in old DTs and don't require any DT changes for this to work if the regmap is looked up by compatible. Regards, Lucas