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([2600:1010:b02e:cd00:cd8d:20c9:ed2e:d844]) by smtp.gmail.com with ESMTPSA id y7sm30806645pfb.139.2020.01.17.08.37.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Jan 2020 08:37:14 -0800 (PST) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: [PATCH] x86/tsc: Add tsc_tuned_baseclk flag disabling CPUID.16h use for tsc calibration Date: Fri, 17 Jan 2020 08:37:12 -0800 Message-Id: <6BFAC54D-65CA-4F8A-9C5B-CEFB108C90FD@amacapital.net> References: <9rN6HvBfpUYE7XjHYSTKXKkKOUHQd_skSYGqjXlI0jTIk4nqLoLUloev1jgSayOdvzmkXgRNP8j_mgcikMJy6L_JN_vJhUJn9vD9xm_ueSo=@protonmail.com> Cc: "corbet@lwn.net" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "x86@kernel.org" , "mchehab+samsung@kernel.org" , "jpoimboe@redhat.com" , "gregkh@linuxfoundation.org" , "pawan.kumar.gupta@linux.intel.com" , "paulmck@linux.ibm.com" , "jgross@suse.com" , "rafael.j.wysocki@intel.com" , "viresh.kumar@linaro.org" , "drake@endlessm.com" , "malat@debian.org" , "mzhivich@akamai.com" , "juri.lelli@redhat.com" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" In-Reply-To: <9rN6HvBfpUYE7XjHYSTKXKkKOUHQd_skSYGqjXlI0jTIk4nqLoLUloev1jgSayOdvzmkXgRNP8j_mgcikMJy6L_JN_vJhUJn9vD9xm_ueSo=@protonmail.com> To: Krzysztof Piecuch X-Mailer: iPhone Mail (17C54) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Jan 17, 2020, at 7:21 AM, Krzysztof Piecuch wr= ote: >=20 > =EF=BB=BFChanging base clock frequency directly impacts tsc hz but not CPU= ID.16h > values. An overclocked CPU supporting CPUID.16h and partial CPUID.15h > support will set tsc hz according to "best guess" given by CPUID.16h > relying on tsc_refine_calibration_work to give better numbers later. > tsc_refine_calibration_work will refuse to do its work when the outcome is= > off the early tsc hz value by more than 1% which is certain to happen on a= n > overclocked system. >=20 Wouldn=E2=80=99t it be better to have an option tsc_max_refinement=3D to inc= rease the 1%?